📄 main.c
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STTUNER_IOREG_AddFieldb( R0297_CTRL_6, F0297_ITLOCKSEL, 4, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_6, F0297_ITPWMSEL, 3, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_6, F0297_LOCKSCE, 1, 2, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_6, F0297_TWB_ACT, 0, 1, FIELD_TYPE_UNSIGNED);
/* CTRL_7 */
STTUNER_IOREG_AddRegb( R0297_CTRL_7, 0x87, 0x13);
STTUNER_IOREG_AddFieldb( R0297_CTRL_7, F0297_SOURCESEL, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_7, F0297_PRGCLKDIV, 4, 3, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_7, F0297_AUXCLKSEL, 3, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_7, F0297_ITLOCK_OD, 1, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_7, F0297_ITPWM_OD, 0, 1, FIELD_TYPE_UNSIGNED);
/* CTRL_8 */
STTUNER_IOREG_AddRegb( R0297_CTRL_8, 0x88, 0x00);
STTUNER_IOREG_AddFieldb( R0297_CTRL_8, F0297_AGC12SEL, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_8, F0297_AGC12B_EN, 6, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_8, F0297_SIGMA_INV_1, 5, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_8, F0297_SIGMA_INV_2, 4, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_8, F0297_EN_CORNER_DET, 3, 1, FIELD_TYPE_UNSIGNED);
/* CTRL_9 */
STTUNER_IOREG_AddRegb( R0297_CTRL_9, 0x89, 0x00);
STTUNER_IOREG_AddFieldb( R0297_CTRL_9, F0297_AUTOQAMMODE_SEL, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_9, F0297_AUTOCONSTEL_TIMER, 3, 4, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_9, F0297_AUTOSTOP_CONSTEL, 2, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_CTRL_9, F0297_AUTOCONSTEL_ON, 1, 1, FIELD_TYPE_UNSIGNED);
/* DEINT_SYNC_0 */
STTUNER_IOREG_AddRegb( R0297_DEINT_SYNC_0, 0x90, 0x01);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_0, F0297_DI_UNLOCK, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_0, F0297_DI_FREEZE, 6, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_0, F0297_MISMATCH, 4, 2, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_0, F0297_ACQ_MODE, 2, 2, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_0, F0297_TRKMODE, 0, 2, FIELD_TYPE_UNSIGNED);
/* DEINT_SYNC_1 */
STTUNER_IOREG_AddRegb( R0297_DEINT_SYNC_1, 0x91, 0x04);
STTUNER_IOREG_AddFieldb( R0297_DEINT_SYNC_1, F0297_SYNLOST, 5, 1, FIELD_TYPE_UNSIGNED);
/* BERT_0 */
STTUNER_IOREG_AddRegb( R0297_BERT_0, 0xA0, 0x00);
STTUNER_IOREG_AddFieldb( R0297_BERT_0, F0297_BERT_ON, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_BERT_0, F0297_ERR_SOURCE, 4, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_BERT_0, F0297_ERR_MODE, 3, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_BERT_0, F0297_NBYTE, 0, 3, FIELD_TYPE_UNSIGNED);
/* BERT_1 */
STTUNER_IOREG_AddRegb( R0297_BERT_1, 0xA1, 0x00);
STTUNER_IOREG_AddFieldb( R0297_BERT_1, F0297_ERRCOUNT_LO, 0, 8, FIELD_TYPE_UNSIGNED);
/* BERT_2 */
STTUNER_IOREG_AddRegb( R0297_BERT_2, 0xA2, 0x00);
STTUNER_IOREG_AddFieldb( R0297_BERT_2, F0297_ERRCOUNT_HI, 0, 8, FIELD_TYPE_UNSIGNED);
/* DEINT_0 */
STTUNER_IOREG_AddRegb( R0297_DEINT_0, 0xB0, 0x91);
STTUNER_IOREG_AddFieldb( R0297_DEINT_0, F0297_USEINT, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_0, F0297_DAVIC, 6, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_DEINT_0, F0297_M, 0, 5, FIELD_TYPE_UNSIGNED);
/* DEINT_1 */
STTUNER_IOREG_AddRegb( R0297_DEINT_1, 0xB1, 0x0B);
STTUNER_IOREG_AddFieldb( R0297_DEINT_1, F0297_DEPTH, 0, 8, FIELD_TYPE_UNSIGNED);
/* OUTFORMAT_0 */
STTUNER_IOREG_AddRegb( R0297_OUTFORMAT_0, 0xC0, 0x43);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_REFRESH47, 6, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_BE_BYPASS, 5, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_CKOUTPAR, 4, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_CT_NBST, 3, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_S_NP, 2, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_TEI_ENA, 1, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_0, F0297_DS_ENA, 0, 1, FIELD_TYPE_UNSIGNED);
/* OUTFORMAT_1 */
STTUNER_IOREG_AddRegb( R0297_OUTFORMAT_1, 0xC1, 0x00);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_1, F0297_SYNC_STRIP, 7, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_1, F0297_CI_EN, 6, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_1, F0297_CICLK_POL, 5, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_1, F0297_CICLK_BASE, 4, 1, FIELD_TYPE_UNSIGNED);
/* OUTFORMAT_2 */
STTUNER_IOREG_AddRegb( R0297_OUTFORMAT_2, 0xC2, 0x00);
STTUNER_IOREG_AddFieldb( R0297_OUTFORMAT_2, F0297_CI_DIVRANGE, 0, 6, FIELD_TYPE_UNSIGNED);
/* RS_DESC_0 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_0, 0xD0, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_0, F0297_BK_CT_LO, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_1 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_1, 0xD1, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_1, F0297_BK_CT_HI, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_2 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_2, 0xD2, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_2, F0297_CORR_CT_LO, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_3 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_3, 0xD3, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_3, F0297_CORR_CT_HI, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_4 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_4, 0xD4, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_4, F0297_UNCORR_CT_LO, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_5 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_5, 0xD5, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_5, F0297_UNCORR_CT_HI, 0, 8, FIELD_TYPE_UNSIGNED);
/* RS_DESC_14 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_14, 0xDE, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_14, F0297_DIS_UNLOCK, 2, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_14, F0297_MODE, 0, 2, FIELD_TYPE_UNSIGNED);
/* RS_DESC_15 */
STTUNER_IOREG_AddRegb( R0297_RS_DESC_15, 0xDF, 0x00);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_15, F0297_CT_CLEAR, 0, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_15, F0297_CT_HOLD, 1, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_15, F0297_RS_NOCORR, 2, 1, FIELD_TYPE_UNSIGNED);
STTUNER_IOREG_AddFieldb( R0297_RS_DESC_15, F0297_SYNCSTATE, 7, 1, FIELD_TYPE_UNSIGNED);
}
void Drv0297_InitSearchb(STTUNER_Modulation_t Modulation, int Frequency, int SymbolRate, STTUNER_Spectrum_t Spectrum)
{
printf("enter Drv0297_InitSearchb...\n");
// U32 BandWidth;
//ST_ErrorCode_t Error;
/*
--- Set Parameters
*/
StateBlock->Params.Frequency = Frequency;
StateBlock->Params.SymbolRate = SymbolRate;
StateBlock->Params.TunerBW = (long)8000;
StateBlock->Params.TunerIF = (long)36000;
StateBlock->Result.SignalType = 2;
StateBlock->Result.Frequency = 0;
StateBlock->Result.SymbolRate = 0;
StateBlock->SpectrumInversion = Spectrum;
StateBlock->Params.Direction = 1;
StateBlock->Params.State = 2;
StateBlock->J83 =0x101;
StateBlock->ScanMode = 1; /* Subranges are scanned in a zig-zag mode */
/*
--- Set QAMSize and SweepRate.
--- SweepRate = 1000* (SweepRate (in MHz/s) / Symbol Rate (in MBaud/s))
*/
switch(Modulation)
{
case STTUNER_MOD_16QAM :
case STTUNER_MOD_32QAM :
case STTUNER_MOD_64QAM :
StateBlock->QAMSize = Modulation; /* Set by user */
StateBlock->SweepRate = 750;
break;
case STTUNER_MOD_128QAM :
case STTUNER_MOD_256QAM :
StateBlock->QAMSize = Modulation; /* Set by user */
StateBlock->SweepRate = 400;
break;
case STTUNER_MOD_QAM :
default:
StateBlock->QAMSize = STTUNER_MOD_64QAM; /* Most Common Modulation for Scan */
StateBlock->SweepRate = 750;
break;
}
/*
--- For low SR, we MUST divide Sweep by 2
*/
if (SymbolRate <= STV0297_SYMBOLRATE_LEVEL)
{
StateBlock->SweepRate /= 2;
}
/*
--- CO
*/
StateBlock->CarrierOffset = 4 * 100; /* in % */
/*
--- Set direction
*/
if ( StateBlock->Params.Direction == 1 )
{
StateBlock->CarrierOffset *= -1;
StateBlock->SweepRate *= 1;
}
else
{
StateBlock->CarrierOffset *= 1;
StateBlock->SweepRate *= -1;
}
}
void Driv0297DemodSettingb(long Offset)
{
long long_tmp ;
long ExtClk ;
int int_tmp ;
printf("enter Driv0297DemodSettingb...\n");
/*
// initial demodulator setting : init freq = IF + Offset - Fclock
*/
ExtClk = EXTERCLK/1000; /* unit Khz*/
long_tmp = StateBlock->Params.TunerIF + Offset; /* in KHz*/
long_tmp -= ExtClk; /* in KHz*/
long_tmp *= 65536 ;
long_tmp /= ExtClk;
if(long_tmp > 65535) long_tmp = 65535 ;
int_tmp = (int)long_tmp ;
STI2C0297_WRITE(R0297_INITDEM_0,(U8)(MAC0297_B0(int_tmp)));
STI2C0297_WRITE(R0297_INITDEM_1,(U8)(MAC0297_B1(int_tmp)));
/*
--- Set Registers
*/
switch(StateBlock->QAMSize)
{
case STTUNER_MOD_16QAM :
STI2C0297_WRITE(R0297_EQU_0, 0x08);
STI2C0297_WRITE(R0297_EQU_1, 0x58);
STI2C0297_WRITE(R0297_CTRL_8, 0x08);
STI2C0297_WRITE(R0297_DEINT_SYNC_0, 0x00);
STI2C0297_WRITE(R0297_BERT_0, 0x84);
STI2C0297_WRITE(R0297_DELAGC_0, 0xF9);
STI2C0297_WRITE(R0297_DELAGC_1, 0x6B);
STI2C0297_WRITE(R0297_DELAGC_2, 0xA6);
STI2C0297_WRITE(R0297_DELAGC_3, 0x17);
STI2C0297_WRITE(R0297_DELAGC_4, 0x29);
STI2C0297_WRITE(R0297_DELAGC_5, 0x6C);
STI2C0297_WRITE(R0297_DELAGC_6, 0x80);
STI2C0297_WRITE(R0297_DELAGC_7, 0x64);
STI2C0297_WRITE(R0297_DELAGC_8, 0xB8);
STI2C0297_WRITE(R0297_WBAGC_1, 0xE4);
STI2C0297_WRITE(R0297_WBAGC_2, 0x3B);
STI2C0297_WRITE(R0297_WBAGC_3, 0x00);
STI2C0297_WRITE(R0297_WBAGC_4, 0x10);
STI2C0297_WRITE(R0297_WBAGC_5, 0x00);
STI2C0297_WRITE(R0297_WBAGC_6, 0x00);
STI2C0297_WRITE(R0297_WBAGC_9, 0x27);
STI2C0297_WRITE(R0297_WBAGC_10, 0x66);
STI2C0297_WRITE(R0297_WBAGC_11, 0xE6);
STI2C0297_WRITE(R0297_STLOOP_2, 0x30);
STI2C0297_WRITE(R0297_STLOOP_3, 0x06);
STI2C0297_WRITE(R0297_STLOOP_9, 0x08);
STI2C0297_WRITE(R0297_STLOOP_10, 0x5E);
STI2C0297_WRITE(R0297_STLOOP_11, 0x04);
STI2C0297_WRITE(R0297_CRL_1, 0x49);
STI2C0297_WRITE(R0297_CRL_2, 0x0B);
STI2C0297_WRITE(R0297_CRL_9, 0x05);
STI2C0297_WRITE(R0297_CRL_10, 0x03);
STI2C0297_WRITE(R0297_PMFAGC_0, 0xFF);
STI2C0297_WRITE(R0297_PMFAGC_1, 0x04);
STI2C0297_WRITE(R0297_PMFAGC_2, 0x00);
STI2C0297_WRITE(R0297_PMFAGC_3, 0x00);
STI2C0297_WRITE(R0297_PMFAGC_4, 0x0C);
break;
/*
----------------------------------------------------------------------
--- QAM 32
----------------------------------------------------------------------
*/
case STTUNER_MOD_32QAM :
STI2C0297_WRITE(R0297_EQU_0, 0x18);
STI2C0297_WRITE(R0297_EQU_1, 0x58);
STI2C0297_WRITE(R0297_CTRL_8, 0x00);
STI2C0297_WRITE(R0297_DEINT_SYNC_0, 0x02);
STI2C0297_WRITE(R0297_BERT_0, 0x85);
STI2C0297_WRITE(R0297_DELAGC_0, 0xF9);
STI2C0297_WRITE(R0297_DELAGC_1, 0x6B);
STI2C0297_WRITE(R0297_DELAGC_2, 0xA6);
STI2C0297_WRITE(R0297_DELAGC_3, 0x17);
STI2C0297_WRITE(R0297_DELAGC_4, 0x29);
STI2C0297_WRITE(R0297_DELAGC_5, 0x6C);
STI2C0297_WRITE(R0297_DELAGC_6, 0x80);
STI2C0297_WRITE(R0297_DELAGC_7, 0x6D);
STI2C0297_WRITE(R0297_DELAGC_8, 0x6D);
STI2C0297_WRITE(R0297_WBAGC_1, 0xF6);
STI2C0297_WRITE(R0297_WBAGC_2, 0x3B);
STI2C0297_WRITE(R0297_WBAGC_3, 0x00);
STI2C0297_WRITE(R0297_WBAGC_4, 0x10);
STI2C0297_WRITE(R0297_WBAGC_5, 0x00);
STI2C0297_WRITE(R0297_WBAGC_6, 0x00);
STI2C0297_WRITE(R0297_WBAGC_9, 0x27);
STI2C0297_WRITE(R0297_WBAGC_10, 0xFF);
STI2C0297_WRITE(R0297_WBAGC_11, 0xFF);
STI2C0297_WRITE(R0297_STLOOP_2, 0x30);
STI2C0297_WRITE(R0297_STLOOP_3, 0x08);
STI2C0297_WRITE(R0297_STLOOP_9, 0x08);
STI2C0297_WRITE(R0297_STLOOP_10, 0x5E);
STI2C0297_WRITE(R0297_STLOOP_11, 0x04);
STI2C0297_WRITE(R0297_CRL_1, 0x49);
STI2C0297_WRITE(R0297_CRL_2, 0x05);
STI2C0297_WRITE(R0297_CRL_9, 0x0F);
STI2C0297_WRITE(R0297_CRL_10, 0x03);
STI2C0297_WRITE(R0297_PMFAGC_0, 0xFF);
STI2C0297_WRITE(R0297_PMFAGC_1, 0x04);
STI2C0297_WRITE(R0297_PMFAGC_2, 0x00);
STI2C0297_WRITE(R029⌨️ 快捷键说明
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