currentsource.lst

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(0089)         ret
        021E: 7F       RET   
(0090) 
(0091) ;;---------------------------------------------------------------------------
(0092) ;; WriteBlind
(0093) ;; ----------
(0094) ;;
(0095) ;; Modify the DAC's update value without worrying about the clocks
(0096) ;;   Lowest overhead, but output may not settle to correct value until the
(0097) ;;   phi2 of next full cycle following the write.
(0098) ;;
(0099) ;; INPUTS: The accumulator, A, contains the input in the appropriate format.
(0100) ;;   The data format is determined by the setting of the DataFormat parameter
(0101) ;;   in the Device Editor.
(0102) ;;
(0103) ;; OUTPUTS: Analog output voltage reflects new value
(0104) ;;---------------------------------------------------------------------------
(0105)  DAC6_1_WriteBlind:
(0106) _DAC6_1_WriteBlind:
(0107) 
(0108)   IF DAC6_1_OFFSETBINARY
(0109)     ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values).
(0110)     ;; Following converts it to 2's complement:
(0111)     sub  A, cOFFSET         ; Apply the offset
(0112)   ENDIF
(0113)   IF DAC6_1_OFFSETBINARY | DAC6_1_TWOSCOMPLEMENT
(0114)     ;; Data is a byte in standard 2's complement form with value in [-31..+31]
(0115)     ;; Following converts it to Sign & Magnitude form "00smmmmm"
(0116)     ;;   where sign, "s", is 1 for negative numbers; 0 for positive
(0117)     ;;   and "m" is the magnitude.
(0118)     asl  A                  ; Multiply by 2 and put sign in Carry flag
DAC6_1_WriteBlind:
_DAC6_1_WriteBlind:
        021F: 64       ASL   A
(0119)     jnc  BlindPositive
        0220: D0 07    JNC   0x0228
(0120)     ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted!
(0121)     cpl  A                  ; bit 0 is a "1" so, following 1 byte "inc" works
        0222: 73       CPL   A
(0122)     inc  A                  ;   (otherwise, we'd have to "add A, 2")
        0223: 74       INC   A
(0123)     or   A, 40h             ; Make it negative by forcing sign bit
        0224: 29 40    OR    A,64
(0124)     jmp  BlindMagSet
        0226: 80 06    JMP   0x022D
(0125) BlindPositive:
(0126)     nop
        0228: 40       NOP   
(0127)     nop
        0229: 40       NOP   
(0128)     nop
        022A: 40       NOP   
(0129)     jmp  BlindMagSet
        022B: 80 01    JMP   0x022D
(0130) BlindMagSet:
(0131)     asr  A                  ; Divide by two to finish up
        022D: 67       ASR   A
(0132)   ENDIF
(0133) 
(0134)     ;; Data is in Sign & Magnitude form.
(0135)     ;; Set FCap and ClockPhase bits
(0136)     or   A, DAC6_1_CR0_HIBITS
        022E: 29 80    OR    A,128
(0137)     mov  reg[DAC6_1_CR0], A
        0230: 60 80    MOV   REG[128],A
(0138)     ret
        0232: 7F       RET   
(0139) 
(0140) ;;---------------------------------------------------------------------------
(0141) ;; WriteStall
(0142) ;; ----------
(0143) ;;
(0144) ;; Modify the DAC's update value, stalling the CPU if necessary.
(0145) ;;   This routine should be used with fast analog clocks or when the
(0146) ;;   resulting interrupt latencies, comparable to the update period,
(0147) ;;   can be tolerated comfortably.
(0148) ;;
(0149) ;; INPUTS: The accumulator, A, contains the input in the appropriate format.
(0150) ;;   The data format is determined by the setting of the DataFormat parameter
(0151) ;;   in the Device Editor.
(0152) ;;
(0153) ;; OUTPUTS: Analog output voltage reflects new value
(0154) ;;---------------------------------------------------------------------------
(0155)  DAC6_1_WriteStall:
(0156) _DAC6_1_WriteStall:
(0157) 
(0158)   IF DAC6_1_OFFSETBINARY
(0159)     ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values).
(0160)     ;; Following converts it to 2's complement:
(0161)     sub  A, cOFFSET         ; Apply the offset
(0162)   ENDIF
(0163)   IF DAC6_1_OFFSETBINARY | DAC6_1_TWOSCOMPLEMENT
(0164)     ;; Data is a byte in standard 2's complement form with value in [-31..+31]
(0165)     ;; Following converts it to Sign & Magnitude form "00smmmmm"
(0166)     ;;   where sign, "s", is 1 for negative numbers; 0 for positive
(0167)     ;;   and "m" is the magnitude.
(0168)     asl  A                  ; Multiply by 2 and put sign in Carry flag
_DAC6_1_WriteStall:
DAC6_1_WriteStall:
        0233: 64       ASL   A
(0169)     jnc  StallPositive
        0234: D0 07    JNC   0x023C
(0170)     cpl  A                  ; "Invert" step of complement 2's complement
        0236: 73       CPL   A
(0171)     inc  A                  ; "Add 1"  step of complement 2's complement
        0237: 74       INC   A
(0172)     or   A, 40h             ; Make it negative
        0238: 29 40    OR    A,64
(0173)     jmp  StallMagSet
        023A: 80 06    JMP   0x0241
(0174) StallPositive:
(0175)     nop
        023C: 40       NOP   
(0176)     nop
        023D: 40       NOP   
(0177)     nop
        023E: 40       NOP   
(0178)     jmp  StallMagSet
        023F: 80 01    JMP   0x0241
(0179) StallMagSet:
(0180)     asr  A                  ; Divide by two to finish conversion
        0241: 67       ASR   A
(0181)   ENDIF
(0182) 
(0183)     ;; Data is in Sign & Magnitude form.
(0184)     ;; Set FCap and ClockPhase bits
(0185)     or   A, DAC6_1_CR0_HIBITS
        0242: 29 80    OR    A,128
(0186)     M8C_Stall
        0244: 43 65 01 OR    REG[101],1
(0187)     mov  reg[DAC6_1_CR0], A
        0247: 60 80    MOV   REG[128],A
(0188)     M8C_Unstall
        0249: 41 65 FE AND   REG[101],254
(0189)     ret
        024C: 7F       RET   
(0190) 
(0191) ;;---------------------------------------------------------------------------
(0192) ;; Stop - Cuts power to the user module.
(0193) ;;
(0194) ;; INPUTS:  None
(0195) ;; OUTPUTS: None
(0196) ;;---------------------------------------------------------------------------
(0197)  DAC6_1_Stop:
(0198) _DAC6_1_Stop:
(0199)     and reg[DAC6_1_CR3], ~bPWRMASK
DAC6_1_Stop:
_DAC6_1_Stop:
        024D: 41 83 FC AND   REG[131],252
(0200)     ret
        0250: 7F       RET   
FILE: lib\buffer.asm
(0001) ;;**********************************************************************
(0002) ;;**********************************************************************
(0003) ;;
(0004) ;; PGA_A.ASM
(0005) ;;
(0006) ;; Assembler source for Programmable Gain Amplifier PGA_A
(0007) ;;
(0008) ;; Rev B, 2002 Mar 30
(0009) ;;
(0010) ;; Copyright (c) 2001-2002 Cypress Microsystems, Inc. All rights reserved.
(0011) ;;
(0012) ;;**********************************************************************
(0013) ;;**********************************************************************
(0014) ;;
(0015) 
(0016) 
(0017) export  Buffer_Start
(0018) export _Buffer_Start
(0019) export  Buffer_SetPower
(0020) export _Buffer_SetPower
(0021) 
(0022) export  Buffer_SetGain
(0023) export _Buffer_SetGain
(0024) 
(0025) export  Buffer_Stop
(0026) export _Buffer_Stop
(0027) 
(0028) ;; -----------------------------------------------------------------
(0029) ;;                         Register Definitions
(0030) ;;
(0031) ;; Uses 1 Continuous Time Block configured as shown. 
(0032) ;;
(0033) ;; * For a Mask/Val pair, this indicates that the value is
(0034) ;;   determined by the user either through config-time parameteriza-
(0035) ;;   tion or run-time manipulation.
(0036) ;;
(0037) ;; BIT FIELD	         Mask/Val Function
(0038) ;; -----------------    	----- 	--------------------
(0039) ;; GAIN_CR0.RES_RATIO_T2B	F0/*	User Parameter (by table)
(0040) ;; GAIN_CR0.GAIN_ATTEN		08/*	Gain (by table)
(0041) ;; GAIN_CR0.RES_SOURCE		04/1	Res source to output
(0042) ;; GAIN_CR0.RES_REF		03/*	Res ref 
(0043) ;;
(0044) ;; GAIN_CR1.A_OUT		80/*	User Parameter (Output bus)
(0045) ;; GAIN_CR1.COMP_EN		40/0	Comparator bus disabled
(0046) ;; GAIN_CR1.CT_NEG_INPUT_MUX	38/4	Neg mux to analog f.b. tap
(0047) ;; GAIN_CR1.CT_POS_INPUT_MUX	07/*	Pos mux, typically to col. input mux
(0048) ;;
(0049) ;; GAIN_CR2.CP_COMP		80/0	Latch transparent on PH1
(0050) ;; GAIN_CR2.CK_COMP		40/0	Latch transparent
(0051) ;; GAIN_CR2.CC_COMP		20/1	Mode OP-AMP (not comparator)
(0052) ;; GAIN_CR2.BYPASS_OBUS		1C/0	Bypass OFF
(0053) ;; GAIN_CR2.PWR_SELECT		03/*	Power OFF (0h) at start-up
(0054) ;;
(0055) ;; --------------------------------------------------------------------
(0056) 
(0057) include "Buffer.inc"
(0058) include "m8c.inc"
(0059) POWERMASK: equ 03h
(0060) GAINMASK: equ f8h
(0061) ;;---------------------------------------------------------------------
(0062) ;; StartSetPower:  Applies power setting to the module's PSoC block
(0063) ;; SetPower: Applies power setting to the module's PSoC block
(0064) ;; INPUTS: A contains the power setting 0=Off, 1=Low, 2=Med, 3=High
(0065) ;;         Value is loaded from .inc file
(0066) ;; OUTPUTS: None
(0067) ;;---------------------------------------------------------------------
(0068)  Buffer_Start:
(0069) _Buffer_Start:
(0070)  Buffer_SetPower:
(0071) _Buffer_SetPower:
(0072) 
(0073)     and A, POWERMASK                         ; mask A to protect unchanged bits
_Buffer_SetPower:
Buffer_Start:
Buffer_SetPower:
_Buffer_Start:
        0251: 21 03    AND   A,3
(0074)     mov X, SP                                ; define temp store location
        0253: 4F       MOV   X,SP
(0075) ;
(0076)     push A                                   ; put power value in temp store
        0254: 08       PUSH  A
(0077)     mov A, reg[Buffer_GAIN_CR2]    ; read power value
        0255: 5D 7B    MOV   A,REG[123]
(0078)     and A, ~POWERMASK                        ; clear power bits in A
        0257: 21 FC    AND   A,252
(0079)     or  A, [X]                               ; combine power value with balance of reg.
        0259: 2B 00    OR    A,[X+0]
(0080)     mov reg[Buffer_GAIN_CR2], A    ; move complete value back to register
        025B: 60 7B    MOV   REG[123],A
(0081)     pop A
        025D: 18       POP   A
(0082)     ret
        025E: 7F       RET   
(0083) 
(0084) ;;---------------------------------------------------------------------------------
(0085) ;;	SetGain:
(0086) ;;	INPUTS: Gain value and GAIN/ATTEN setting
(0087) ;;		  Use gain set values from .inc file
(0088) ;;	OUTPUTS: None
(0089) ;;
(0090) ;;	Gain values shown are for example
(0091) ;;	16.0	1	0 0 0 0			
(0092) ;;	8.00	1	0 0 0 1
(0093) ;;	....
(0094) ;;	1.00	1	1 1 1 1
(0095) ;;	0.93	0	1 1 1 0
(0096) ;;	....
(0097) ;;	0.12	0	0 0 0 1
(0098) ;;	0.06	0	0 0 0 0
(0099) ;;--------------------------------------------------------------------------------
(0100)  Buffer_SetGain:
(0101) _Buffer_SetGain:
(0102) 
(0103)     and A, GAINMASK                          ; mask A to protect unchanged bits
_Buffer_SetGain:
Buffer_SetGain:
        025F: 21 F8    AND   A,248
(0104)     mov X, SP                                ; define temp store location
        0261: 4F       MOV   X,SP
(0105) ;
(0106)     push A                                   ; put gain value in temp store
        0262: 08       PUSH  A
(0107)     mov A, reg[Buffer_GAIN_CR0]    ; read power value
        0263: 5D 79    MOV   A,REG[121]
(0108)     and A, ~GAINMASK                         ; clear gain bits in A
        0265: 21 07    AND   A,7
(0109)     or  A, [X]                               ; combine gain value with balance of reg.
        0267: 2B 00    OR    A,[X+0]
(0110)     mov reg[Buffer_GAIN_CR0], A    ; move complete value back to register
        0269: 60 79    MOV   REG[121],A
(0111)     pop A
        026B: 18       POP   A
(0112)     ret
        026C: 7F       RET   
(0113) 
(0114) ;;---------------------------------------------------------------------
(0115) ;; Stop:  Cuts power to the user module
(0116) ;;
(0117) ;; INPUTS: None
(0118) ;; OUPTUTS: None
(0119) ;;---------------------------------------------------------------------
(0120)  Buffer_Stop:
(0121) _Buffer_Stop:
(0122) 
(0123)     and REG[Buffer_GAIN_CR2], ~POWERMASK
_Buffer_Stop:
Buffer_Stop:
        026D: 41 7B FC AND   REG[123],252
(0124)     ret
FILE: <library>
        0270: 7F       RET