currentsource.lst

来自「Application Note Abstract The unique co」· LST 代码 · 共 1,542 行 · 第 1/5 页

(0034) ;; for time efficiency.
(0035) ;;
(0036) ;; * For a Mask/Val pair, this simply indicates that the value is
(0037) ;;   determined by the user either through config-time parameteriza-
(0038) ;;   tion or run-time manipulation.
(0039) ;;
(0040) ;; BIT FIELD         Mask/Val Function
(0041) ;; -----------------    ----- --------------------
(0042) ;; CR0.FCap             80/1  Feedback cap size 32
(0043) ;; CR0.ClockPhase       40/0  Normal phase
(0044) ;; CR0.ASign            20/*  User parameter
(0045) ;; CR0.ACap             1F/*  User parameter
(0046) ;;
(0047) ;; CR1.ACMux            E0/2  (SCA) A:VRef High, C:Don't Care
(0048) ;; CR1.AMux             E0/4  (SCB) VRef High
(0049) ;; CR1.BCap             1F/0  Prune B-input branch
(0050) ;;
(0051) ;; CR2.AnalogBus        80/*  User Parameter: Output Bus Enable
(0052) ;; CR2.CmpBus           40/0  Comparator Bus Disable
(0053) ;; CR2.AutoZero         20/1  Auto-Zero enabled on Phi 1
(0054) ;; CR2.CCap             1F/0  Prune C-input branch
(0055) ;;
(0056) ;; CR3.ARefSelect       C0/0  Use AGND (to invert)
(0057) ;; CR3.FSW1             20/1  Feedback Cap Used
(0058) ;; CR3.FSW2             10/1  Feedback Cap Grounded for AZ
(0059) ;; CR3.BMux             0C/0  (SCA) Don't Care - this branch pruned
(0060) ;; CR3.BSW              08/0  (SCB) Don't Care - this branch pruned
(0061) ;; CR3.BMux             04/0  (SCB) Don't Care - this branch pruned
(0062) ;; CR3.PWR              03/*  User Parameter: Power, def=OFF
(0063) ;;
(0064) 
(0065) include "DAC6_2.inc"
(0066) include "m8c.inc"
(0067) 
(0068) cOFFSET:   equ 31               ; Conversion term for offset binary to 2's C
(0069) bPWRMASK:  equ 03h              ; Power bitfield in Switched Cap CR3 reg
(0070) bCR3:      equ 30h              ; Except for power bits, CR3 ALWAYS looks
(0071)                                 ;    like this regardless of SC block type
(0072)                                 ;    or where the DAC gets mapped.
(0073) 
(0074) area text (ROM, REL)
(0075) 
(0076) ;;---------------------------------------------------------------------------
(0077) ;; Start / SetPower - Applies power setting to the module's SoCblocs
(0078) ;;
(0079) ;; INPUTS: A contains the power setting 0=Off, 1=Low, 2=Med, 3=High
(0080) ;; OUTUTS: None
(0081) ;;---------------------------------------------------------------------------
(0082)  DAC6_2_Start:
(0083) _DAC6_2_Start:
(0084)  DAC6_2_SetPower:
(0085) _DAC6_2_SetPower:
(0086)         and A, bPWRMASK
_DAC6_2_Start:
DAC6_2_SetPower:
_DAC6_2_SetPower:
DAC6_2_Start:
        01DF: 21 03    AND   A,3
(0087)         or  A, bCR3             ; Set all other bits in addition to power
        01E1: 29 30    OR    A,48
(0088)         mov reg[DAC6_2_CR3], A
        01E3: 60 9B    MOV   REG[155],A
(0089)         ret
        01E5: 7F       RET   
(0090) 
(0091) ;;---------------------------------------------------------------------------
(0092) ;; WriteBlind
(0093) ;; ----------
(0094) ;;
(0095) ;; Modify the DAC's update value without worrying about the clocks
(0096) ;;   Lowest overhead, but output may not settle to correct value until the
(0097) ;;   phi2 of next full cycle following the write.
(0098) ;;
(0099) ;; INPUTS: The accumulator, A, contains the input in the appropriate format.
(0100) ;;   The data format is determined by the setting of the DataFormat parameter
(0101) ;;   in the Device Editor.
(0102) ;;
(0103) ;; OUTPUTS: Analog output voltage reflects new value
(0104) ;;---------------------------------------------------------------------------
(0105)  DAC6_2_WriteBlind:
(0106) _DAC6_2_WriteBlind:
(0107) 
(0108)   IF DAC6_2_OFFSETBINARY
(0109)     ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values).
(0110)     ;; Following converts it to 2's complement:
(0111)     sub  A, cOFFSET         ; Apply the offset
(0112)   ENDIF
(0113)   IF DAC6_2_OFFSETBINARY | DAC6_2_TWOSCOMPLEMENT
(0114)     ;; Data is a byte in standard 2's complement form with value in [-31..+31]
(0115)     ;; Following converts it to Sign & Magnitude form "00smmmmm"
(0116)     ;;   where sign, "s", is 1 for negative numbers; 0 for positive
(0117)     ;;   and "m" is the magnitude.
(0118)     asl  A                  ; Multiply by 2 and put sign in Carry flag
_DAC6_2_WriteBlind:
DAC6_2_WriteBlind:
        01E6: 64       ASL   A
(0119)     jnc  BlindPositive
        01E7: D0 07    JNC   0x01EF
(0120)     ;; Neg to pos by "Invert & Add 1" procedure, but data is shifted!
(0121)     cpl  A                  ; bit 0 is a "1" so, following 1 byte "inc" works
        01E9: 73       CPL   A
(0122)     inc  A                  ;   (otherwise, we'd have to "add A, 2")
        01EA: 74       INC   A
(0123)     or   A, 40h             ; Make it negative by forcing sign bit
        01EB: 29 40    OR    A,64
(0124)     jmp  BlindMagSet
        01ED: 80 06    JMP   0x01F4
(0125) BlindPositive:
(0126)     nop
        01EF: 40       NOP   
(0127)     nop
        01F0: 40       NOP   
(0128)     nop
        01F1: 40       NOP   
(0129)     jmp  BlindMagSet
        01F2: 80 01    JMP   0x01F4
(0130) BlindMagSet:
(0131)     asr  A                  ; Divide by two to finish up
        01F4: 67       ASR   A
(0132)   ENDIF
(0133) 
(0134)     ;; Data is in Sign & Magnitude form.
(0135)     ;; Set FCap and ClockPhase bits
(0136)     or   A, DAC6_2_CR0_HIBITS
        01F5: 29 80    OR    A,128
(0137)     mov  reg[DAC6_2_CR0], A
        01F7: 60 98    MOV   REG[152],A
(0138)     ret
        01F9: 7F       RET   
(0139) 
(0140) ;;---------------------------------------------------------------------------
(0141) ;; WriteStall
(0142) ;; ----------
(0143) ;;
(0144) ;; Modify the DAC's update value, stalling the CPU if necessary.
(0145) ;;   This routine should be used with fast analog clocks or when the
(0146) ;;   resulting interrupt latencies, comparable to the update period,
(0147) ;;   can be tolerated comfortably.
(0148) ;;
(0149) ;; INPUTS: The accumulator, A, contains the input in the appropriate format.
(0150) ;;   The data format is determined by the setting of the DataFormat parameter
(0151) ;;   in the Device Editor.
(0152) ;;
(0153) ;; OUTPUTS: Analog output voltage reflects new value
(0154) ;;---------------------------------------------------------------------------
(0155)  DAC6_2_WriteStall:
(0156) _DAC6_2_WriteStall:
(0157) 
(0158)   IF DAC6_2_OFFSETBINARY
(0159)     ;; Data is an unsigned byte value in [0..62] (i.e., 63 unique values).
(0160)     ;; Following converts it to 2's complement:
(0161)     sub  A, cOFFSET         ; Apply the offset
(0162)   ENDIF
(0163)   IF DAC6_2_OFFSETBINARY | DAC6_2_TWOSCOMPLEMENT
(0164)     ;; Data is a byte in standard 2's complement form with value in [-31..+31]
(0165)     ;; Following converts it to Sign & Magnitude form "00smmmmm"
(0166)     ;;   where sign, "s", is 1 for negative numbers; 0 for positive
(0167)     ;;   and "m" is the magnitude.
(0168)     asl  A                  ; Multiply by 2 and put sign in Carry flag
DAC6_2_WriteStall:
_DAC6_2_WriteStall:
        01FA: 64       ASL   A
(0169)     jnc  StallPositive
        01FB: D0 07    JNC   0x0203
(0170)     cpl  A                  ; "Invert" step of complement 2's complement
        01FD: 73       CPL   A
(0171)     inc  A                  ; "Add 1"  step of complement 2's complement
        01FE: 74       INC   A
(0172)     or   A, 40h             ; Make it negative
        01FF: 29 40    OR    A,64
(0173)     jmp  StallMagSet
        0201: 80 06    JMP   0x0208
(0174) StallPositive:
(0175)     nop
        0203: 40       NOP   
(0176)     nop
        0204: 40       NOP   
(0177)     nop
        0205: 40       NOP   
(0178)     jmp  StallMagSet
        0206: 80 01    JMP   0x0208
(0179) StallMagSet:
(0180)     asr  A                  ; Divide by two to finish conversion
        0208: 67       ASR   A
(0181)   ENDIF
(0182) 
(0183)     ;; Data is in Sign & Magnitude form.
(0184)     ;; Set FCap and ClockPhase bits
(0185)     or   A, DAC6_2_CR0_HIBITS
        0209: 29 80    OR    A,128
(0186)     M8C_Stall
        020B: 43 65 01 OR    REG[101],1
(0187)     mov  reg[DAC6_2_CR0], A
        020E: 60 98    MOV   REG[152],A
(0188)     M8C_Unstall
        0210: 41 65 FE AND   REG[101],254
(0189)     ret
        0213: 7F       RET   
(0190) 
(0191) ;;---------------------------------------------------------------------------
(0192) ;; Stop - Cuts power to the user module.
(0193) ;;
(0194) ;; INPUTS:  None
(0195) ;; OUTPUTS: None
(0196) ;;---------------------------------------------------------------------------
(0197)  DAC6_2_Stop:
(0198) _DAC6_2_Stop:
(0199)     and reg[DAC6_2_CR3], ~bPWRMASK
_DAC6_2_Stop:
DAC6_2_Stop:
        0214: 41 9B FC AND   REG[155],252
(0200)     ret
        0217: 7F       RET   
FILE: lib\dac6_1.asm
(0001) ;;************************************************************************
(0002) ;;************************************************************************
(0003) ;;
(0004) ;;  DAC6_1.ASM (from DAC6.asm user module template)
(0005) ;;  Rev C, 2002 July 25
(0006) ;;
(0007) ;;  Assembler source for 6-bit Switched Capacitor DAC API
(0008) ;;
(0009) ;;  Copyright (c) Cypress MicroSystems 2001-2002. All Rights Reserved.
(0010) ;;
(0011) ;;************************************************************************
(0012) ;;************************************************************************
(0013) ;;
(0014) 
(0015) export  DAC6_1_Start
(0016) export _DAC6_1_Start
(0017) export  DAC6_1_SetPower
(0018) export _DAC6_1_SetPower
(0019) 
(0020) export  DAC6_1_WriteBlind
(0021) export _DAC6_1_WriteBlind
(0022) export  DAC6_1_WriteStall
(0023) export _DAC6_1_WriteStall
(0024) 
(0025) export  DAC6_1_Stop
(0026) export _DAC6_1_Stop
(0027) 
(0028) ;; -----------------------------------------------------------------
(0029) ;;                         Register Definitions
(0030) ;; -----------------------------------------------------------------
(0031) ;;
(0032) ;; Uses 1 Switched Cap Block configured as shown. This API depends
(0033) ;; on knowing the exact personalization of CR0 and CR3 bitfields
(0034) ;; for time efficiency.
(0035) ;;
(0036) ;; * For a Mask/Val pair, this simply indicates that the value is
(0037) ;;   determined by the user either through config-time parameteriza-
(0038) ;;   tion or run-time manipulation.
(0039) ;;
(0040) ;; BIT FIELD         Mask/Val Function
(0041) ;; -----------------    ----- --------------------
(0042) ;; CR0.FCap             80/1  Feedback cap size 32
(0043) ;; CR0.ClockPhase       40/0  Normal phase
(0044) ;; CR0.ASign            20/*  User parameter
(0045) ;; CR0.ACap             1F/*  User parameter
(0046) ;;
(0047) ;; CR1.ACMux            E0/2  (SCA) A:VRef High, C:Don't Care
(0048) ;; CR1.AMux             E0/4  (SCB) VRef High
(0049) ;; CR1.BCap             1F/0  Prune B-input branch
(0050) ;;
(0051) ;; CR2.AnalogBus        80/*  User Parameter: Output Bus Enable
(0052) ;; CR2.CmpBus           40/0  Comparator Bus Disable
(0053) ;; CR2.AutoZero         20/1  Auto-Zero enabled on Phi 1
(0054) ;; CR2.CCap             1F/0  Prune C-input branch
(0055) ;;
(0056) ;; CR3.ARefSelect       C0/0  Use AGND (to invert)
(0057) ;; CR3.FSW1             20/1  Feedback Cap Used
(0058) ;; CR3.FSW2             10/1  Feedback Cap Grounded for AZ
(0059) ;; CR3.BMux             0C/0  (SCA) Don't Care - this branch pruned
(0060) ;; CR3.BSW              08/0  (SCB) Don't Care - this branch pruned
(0061) ;; CR3.BMux             04/0  (SCB) Don't Care - this branch pruned
(0062) ;; CR3.PWR              03/*  User Parameter: Power, def=OFF
(0063) ;;
(0064) 
(0065) include "DAC6_1.inc"
(0066) include "m8c.inc"
(0067) 
(0068) cOFFSET:   equ 31               ; Conversion term for offset binary to 2's C
(0069) bPWRMASK:  equ 03h              ; Power bitfield in Switched Cap CR3 reg
(0070) bCR3:      equ 30h              ; Except for power bits, CR3 ALWAYS looks
(0071)                                 ;    like this regardless of SC block type
(0072)                                 ;    or where the DAC gets mapped.
(0073) 
(0074) area text (ROM, REL)
(0075) 
(0076) ;;---------------------------------------------------------------------------
(0077) ;; Start / SetPower - Applies power setting to the module's SoCblocs
(0078) ;;
(0079) ;; INPUTS: A contains the power setting 0=Off, 1=Low, 2=Med, 3=High
(0080) ;; OUTUTS: None
(0081) ;;---------------------------------------------------------------------------
(0082)  DAC6_1_Start:
(0083) _DAC6_1_Start:
(0084)  DAC6_1_SetPower:
(0085) _DAC6_1_SetPower:
(0086)         and A, bPWRMASK
DAC6_1_Start:
_DAC6_1_Start:
DAC6_1_SetPower:
_DAC6_1_SetPower:
        0218: 21 03    AND   A,3
(0087)         or  A, bCR3             ; Set all other bits in addition to power
        021A: 29 30    OR    A,48
(0088)         mov reg[DAC6_1_CR3], A
        021C: 60 83    MOV   REG[131],A