currentsource.lst

来自「Application Note Abstract The unique co」· LST 代码 · 共 1,542 行 · 第 1/5 页

(0236)     jz .WaitFor16ms             ; TimeOut occurs on Sleep Timer 16ms
(0237) 
(0238) ELSE ;!(SELECT_32K)
(0239)     ERROR_PSoC Using the PLL without the Crystal is invalid.
(0240) ENDIF ;(SELECT_32K)
(0241) ENDIF ;(PLL_MODE)
(0242) 
(0243)     ;-------------------------------------------------------------------------
(0244)     ; default CT block RTopMux to OUT and RBotMux to AGND
(0245)     ;-------------------------------------------------------------------------
(0246) 
(0247)     mov reg[ACA00CR0],05h
        0059: 62 71 05 MOV   REG[113],5
(0248)     mov reg[ACA01CR0],05h
        005C: 62 75 05 MOV   REG[117],5
(0249)     mov reg[ACA02CR0],05h
        005F: 62 79 05 MOV   REG[121],5
(0250)     mov reg[ACA03CR0],05h
        0062: 62 7D 05 MOV   REG[125],5
(0251) 
(0252)     ;-------------------------------------------------------------------------
(0253)     ; All the user selections and UserModule selections are now loaded.
(0254)     ; !!! Except CPU frequency !!!! (CPU is runing at 12 MHz)
(0255)     ;-------------------------------------------------------------------------
(0256) 
(0257) Config: 
(0258)     lcall LoadConfigInit           ; Configure PSoC blocks per Dev Editor
        0065: 7C 01 86 LCALL 0x0186
(0259) 
(0260) 
(0261) IF (C_LANGUAGE_SUPPORT)
(0262)     call InitCRunTime              ; Initialize for C language
        0068: 90 22    CALL  0x008C
(0263) ENDIF ;(C_LANGUAGE_SUPPORT)
(0264) 
(0265)     mov reg[INT_VC],0              ; Clear any pending interrupts which may
        006A: 62 E2 00 MOV   REG[226],0
(0266)                                    ; have been set during the boot process. 
(0267) 
(0268)     ;-------------------------------------------------------------------------
(0269)     ; We always enable LVD / Voltage Monitoring by default
(0270)     ;-------------------------------------------------------------------------
(0271) 
(0272)     M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only
        006D: 43 E0 01 OR    REG[224],1
(0273) 
(0274) IF (SWITCH_MODE_PUMP ^ 1) ; !!! This value is 1 if the SMP is disabled !!!
(0275)     ;-------------------------------------------------------------------------
(0276)     ; Pump is enabled, and customer requests it to work. Vcc is currently at
(0277)     ; or is slewing towards customer's requested Vcc.
(0278)     ;-------------------------------------------------------------------------
(0279) 
(0280) IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz) ; Clock is not 24MHz
(0281)     ;-------------------------------------------------------------------------
(0282)     ; < 24 MHz operation is requested. Any reasonable Vcc is OK.
(0283)     ;-------------------------------------------------------------------------
(0284) 
(0285) ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
(0286)     ;-------------------------------------------------------------------------
(0287)     ; 24 MHz operation is requested. Requires 5V operation.
(0288)     ; Only 07h setting is valid (04h | 03h)
(0289)     ;-------------------------------------------------------------------------
(0290) 
(0291) IF (SUPPLY_VOLTAGE)
(0292)     ;-------------------------------------------------------------------------
(0293)     ; 4.19 thru 5.0 V is selected
(0294)     ;-------------------------------------------------------------------------
(0295) 
(0296) IF (TRIP_VOLTAGE ^ 07h)
(0297)     ERROR_PSoC TRIP_VOLTAGE must be 4.64V(5.00V) for 24 MHz operation
(0298) 
(0299) ENDIF ;(TRIP_VOLTAGE ^ 07h)
(0300) 
(0301) ELSE ;!(SUPPLY_VOLTAGE)
(0302)     ERROR_PSoC Only valid SMP setting is 5.0 V
(0303) 
(0304) ENDIF ;(SUPPLY_VOLTAGE)
(0305) ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
(0306) 
(0307)     ;-------------------------------------------------------------------------
(0308)     ; But must wait for the SMP to slew from 3.1 to 5 Volts, if SMP selected.
(0309)     ;-------------------------------------------------------------------------
(0310)     M8C_EnableIntMask INT_MSK0, INT_MSK0_Sleep
(0311) 
(0312) IF (SUPPLY_VOLTAGE)
(0313)     M8C_SetBank1
(0314)     mov reg[OSC_CR0], OSC_CR0_Sleep_512Hz
(0315)     M8C_SetBank0
(0316) 
(0317)     M8C_ClearWDTAndSleep        ; Reset the sleep timer
(0318) 
(0319)     mov reg[INT_VC],0           ; Clear all pending interrupts
(0320) .WaitFor2ms:
(0321)     mov A, reg[INT_VC]          ; read Interrupt Vector
(0322)     jz .WaitFor2ms              ; TimeOut occurs on Sleep Timer 2ms
(0323) ENDIF ;(SUPPLY_VOLTAGE)
(0324) 
(0325)     ;-------------------------------------------------------------------------
(0326)     ; Vcc is Stable and Correct, at 5V range. Setup LVD for Brownout
(0327)     ;-------------------------------------------------------------------------
(0328) 
(0329)     M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only
(0330) 
(0331) ELSE ;!(SWITCH_MODE_PUMP ^ 1) ; SMP is disabled
(0332)     ;-------------------------------------------------------------------------
(0333)     ; Normal operation with no pump.
(0334)     ;-------------------------------------------------------------------------
(0335) 
(0336)     M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only
        0070: 43 E0 01 OR    REG[224],1
(0337) 
(0338) IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
(0339)     ;-------------------------------------------------------------------------
(0340)     ; < 24 MHz operation is requested. Any reasonable Vcc is OK.
(0341)     ;-------------------------------------------------------------------------
(0342) 
(0343) ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
(0344)     ;-------------------------------------------------------------------------
(0345)     ; 24 MHz operation is requested. Requires 5V operation.
(0346)     ;-------------------------------------------------------------------------
(0347) 
(0348) IF (SUPPLY_VOLTAGE)
(0349)     ; Set the CPU speed to 93.75kHz in order to slow down INT_VC read
(0350)     M8C_SetBank1
(0351)     mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_93d7kHz)
(0352) .LVDLoop: 
(0353)     M8C_SetBank1
(0354)     mov reg[VLT_CR], 00h     ; LVD at 2.95 V (Power Good if >2.95V)
(0355)     M8C_SetBank0
(0356)     mov reg[INT_VC],0        ; Clear LVD interrupt
(0357)     M8C_SetBank1
(0358)     mov reg[VLT_CR], 07h     ; Force LVD at 4.64 V (Power Not good if <4.64V)
(0359)     M8C_SetBank0             ; Must wait 10 usec before reading INT_VC
(0360)     mov A, reg[INT_VC]
(0361)     jz .GoodVcc
(0362)     jmp .LVDLoop             ; Wait for good Vcc
(0363) .GoodVcc:
(0364)     ;-------------------------------------------------------------------------
(0365)     ; Leave LVD at 4.64 V (Required, no exceptions)
(0366)     ;-------------------------------------------------------------------------
(0367) 
(0368) ELSE ;!(SUPPLY_VOLTAGE)
(0369) 
(0370)     ERROR_PSoC 24 MHz at other than 5V is invalid.
(0371) 
(0372) ENDIF ;(SUPPLY_VOLTAGE)
(0373) ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
(0374) ENDIF ;(SWITCH_MODE_PUMP ^ 1)
(0375) 
(0376)     ;-------------------------------------------------------------------------
(0377)     ; Disable the Sleep interrupt that was used for timing above.
(0378)     ;-------------------------------------------------------------------------
(0379)     M8C_DisableIntMask INT_MSK0, INT_MSK0_Sleep
        0073: 5D FF    MOV   A,REG[255]
        0075: 70 FE    AND   F,254
        0077: 41 E0 BF AND   REG[224],191
        007A: 21 80    AND   A,128
        007C: A0 03    JZ    0x0080
        007E: 71 01    OR    F,1
(0380) 
(0381)     ;-------------------------------------------------------------------------
(0382)     ; Everything has started OK. Now select requested CPU & sleep frequency.
(0383)     ;-------------------------------------------------------------------------
(0384) 
(0385)     M8C_SetBank1
        0080: 71 10    OR    F,16
(0386)     mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
        0082: 62 E0 00 MOV   REG[224],0
(0387)     M8C_SetBank0
        0085: 70 EF    AND   F,239
(0388) 
(0389)     ;-------------------------------------------------------------------------
(0390)     ; Global Interrupt are NOT enabled, this should be done in main().
(0391)     ; LVD is set but will not occur unless Global Interrupts are enabled. 
(0392)     ; Global Interrupts should be as soon as possible in main().
(0393)     ;-------------------------------------------------------------------------
(0394) 
(0395)     lcall _main                    ; Call main
        0087: 7C 01 C8 LCALL __text_start
(0396) 
(0397) __Exit:
(0398)     jmp __Exit                    ; Wait here till power is turned off
        008A: 8F FF    JMP   0x008A
(0399) 
(0400) 
(0401) 
(0402) ;-----------------------------------------------------------------------------
(0403) ; C Runtime Environment Initialization
(0404) ; The following code is conditionally assembled.
(0405) ;-----------------------------------------------------------------------------
(0406) 
(0407) IF (C_LANGUAGE_SUPPORT)
(0408) 
(0409) InitCRunTime:
(0410)     ;-----------------------------
(0411)     ; clear bss segment
(0412)     ;-----------------------------
(0413)     mov A,0
        008C: 50 00    MOV   A,0
(0414)     mov [__r0],<__bss_start
        008E: 55 00 01 MOV   [__r0],1
(0415) BssLoop:
(0416)     cmp [__r0],<__bss_end
        0091: 3C 00 01 CMP   [__r0],1
(0417)     jz BssDone
        0094: A0 05    JZ    0x009A
(0418)     mvi [__r0],A
        0096: 3F 00    MVI   [__r0],A
(0419)     jmp BssLoop
        0098: 8F F8    JMP   0x0091
(0420) BssDone:
(0421)     ;----------------------------
(0422)     ; copy idata to data segment
(0423)     ;----------------------------
(0424)     mov A,>__idata_start
        009A: 50 01    MOV   A,1
(0425)     mov X,<__idata_start
        009C: 57 86    MOV   X,134
(0426)     mov [__r0],<__data_start
        009E: 55 00 00 MOV   [__r0],0
(0427) IDataLoop:
(0428)     cmp [__r0],<__data_end
        00A1: 3C 00 00 CMP   [__r0],0
(0429)     jz IDataDone
        00A4: A0 0B    JZ    0x00B0
(0430)     push A
        00A6: 08       PUSH  A
(0431)     romx
        00A7: 28       ROMX  
(0432)     mvi [__r0],A
        00A8: 3F 00    MVI   [__r0],A
(0433)     pop A
        00AA: 18       POP   A
(0434)     inc X
        00AB: 75       INC   X
(0435)     adc A,0
        00AC: 09 00    ADC   A,0
(0436)     jmp IDataLoop
        00AE: 8F F2    JMP   0x00A1
(0437) IDataDone:
(0438)     ret
        00B0: 7F       RET   
        00B1: 30       HALT  
        00B2: 30       HALT  
        00B3: 30       HALT  
        00B4: 30       HALT  
        00B5: 30       HALT  
        00B6: 30       HALT  
        00B7: 30       HALT  
        00B8: 30       HALT  
        00B9: 30       HALT  
        00BA: 30       HALT  
        00BB: 30       HALT  
        00BC: 30       HALT  
        00BD: 30       HALT  
        00BE: 30       HALT  
        00BF: 30       HALT  
        00C0: 30       HALT  
        00C1: 30       HALT  
        00C2: 30       HALT  
        00C3: 30       HALT  
        00C4: 30       HALT  
        00C5: 30       HALT  
        00C6: 30       HALT  
        00C7: 30       HALT  
        00C8: 30       HALT  
        00C9: 30       HALT  
        00CA: 30       HALT  
        00CB: 30       HALT  
        00CC: 30       HALT  
        00CD: 30       HALT  
        00CE: 30       HALT  
        00CF: 30       HALT  
        00D0: 30       HALT  
        00D1: 30       HALT  
        00D2: 30       HALT  
        00D3: 30       HALT  
        00D4: 30       HALT  
        00D5: 30       HALT  
        00D6: 30       HALT  
        00D7: 30       HALT  
        00D8: 30       HALT  
        00D9: 30       HALT  
        00DA: 30       HALT  
        00DB: 30       HALT  
        00DC: 30       HALT  
        00DD: 30       HALT  
        00DE: 30       HALT  
        00DF: 30       HALT  
        00E0: 30       HALT  
        00E1: 30       HALT  
        00E2: 30       HALT  
        00E3: 30       HALT  
        00E4: 30       HALT  
        00E5: 30       HALT  
        00E6: 30       HALT  
        00E7: 30       HALT  
        00E8: 30       HALT  
        00E9: 30       HALT  
        00EA: 30       HALT  
        00EB: 30       HALT  
        00EC: 30       HALT  
        00ED: 30       HALT  
        00EE: 30       HALT  
        00EF: 30       HALT  
        00F0: 30       HALT  
        00F1: 30       HALT  
        00F2: 30       HALT  
        00F3: 30       HALT