main.lis
来自「Application Note Abstract The unique co」· LIS 代码 · 共 638 行 · 第 1/3 页
LIS
638 行
00F0 OSC_CR1_V1: equ F0h ; MASK System V1 24MHz divider
000F OSC_CR1_V2: equ 0Fh ; MASK System V2 24MHz divider
0000
0000 ;Reserved equ E2h
00E3 VLT_CR: equ E3h ; Voltage Monitor Control Register (RW)
0000
00E8 IMO_TR: equ E8h ; Internal Main Oscillator Trim Register (WO)
00E9 ILO_TR: equ E9h ; Internal Low-speed Oscillator Trim (WO)
00EA BDG_TR: equ EAh ; Band Gap Trim Register (WO)
00EB ECO_TR: equ EBh ; External Oscillator Trim Register (WO)
0000
0000
0000
0000 ;;===================================
0000 ;; M8C System Macros
0000 ;;===================================
0000
0000
0000 ;-------------------------------
0000 ; Swapping Register Banks
0000 ;-------------------------------
0000
0000 macro M8C_SetBank0
0000 and F, ~FlagXIOMask
0000 macro M8C_SetBank1
0000 or F, FlagXIOMask
0000 macro M8C_EnableGInt
0000 or F, FlagGlobalIE
0000 macro M8C_DisableGInt
0000 and F, ~FlagGlobalIE
0001 DISABLE_INT_FIX: equ 1
0000 ;---------------------------------------------------
0000 ; Use the following macros to enable/disable
0000 ; either of the two global interrupt mask registers,
0000 ; INT_MSK0 or INT_MSK1.
0000 ;
0000 ; This is a fix to a noted problem in which an
0000 ; inadvertant reset can occur if an interrupt occurs
0000 ; while clearing an interrupt mask bit.
0000 ;
0000 ; Usage: M8C_DisableIntMask INT_MSKN, MASK
0000 ; M8C_EnableIntMask INT_MSKN, MASK
0000 ;
0000 ; where INT_MSKN is INT_MSK0 or INT_MSK1 and
0000 ; MASK is the bit set to enable or disable
0000 ;-------------------------------------------------
0000 ; Disable Interrupt Bit Mask(s)
0000 macro M8C_DisableIntMask
0000 if DISABLE_INT_FIX
0000 mov A, reg[CPU_SCR] ; save the current Global interrupt state
0000 M8C_DisableGInt ; disable global interrupts
0000 endif
0000 and reg[@0], ~@1 ; disable specified interrupt enable bit
0000 if DISABLE_INT_FIX
0000 and A, CPUSCR_GIEMask ; determine if global interrupt was set
0000 jz . + 4 ; jump if global interrupt disabled
0000 M8C_EnableGInt ; set global interrupt
0000 endif
0000 macro M8C_EnableIntMask
0000 or reg[@0], @1
0000 macro M8C_EnableWatchDog
0000 ; Clearing the Power-On Reset bit starts up the Watchdog timer
0000 ; See the 25xxx/26xxx Family Datasheet, Section 9.3.4.
0000 and reg[CPU_SCR], ~CPUSCR_PORSMask & ~CPUSCR_WDRSMask
0000 macro M8C_ClearWDT
0000 mov reg[RES_WDT], 00h
0000 macro M8C_ClearWDTAndSleep
0000 mov reg[RES_WDT], 38h
0000 macro M8C_Stall
0000 or reg[ASY_CR], ASY_CR_SYNCEN
0000 macro M8C_Unstall
0000 and reg[ASY_CR], ~ASY_CR_SYNCEN
0000 macro M8C_Sleep
0000 or reg[CPU_SCR], CPUSCR_SleepMask
0000 ; The next instruction to be executed depends on the state of the
0000 ; various interrupt enable bits. If some interrupts are enabled
0000 ; and the global interrupts are disabled, the next instruction will
0000 ; be the one that follows the invocation of this macro. If global
0000 ; interrupts are also enabled then the next instruction will be
0000 ; from the interrupt vector table. If no interrupts are enabled
0000 ; then RIP.
0000 macro M8C_Stop
0000 ; In general, you probably don't want to do this, but here's how:
0000 or reg[CPU_SCR], CPUSCR_StopMask
0000 ; Next instruction to be executed is located in the interrupt
0000 ; vector table entry for Power-On Reset.
0000 macro M8C_Reset
0000 ; Restore everything to the power-on reset state.
0000 mov A, 0
0000 SSC
0000 ; Next non-supervisor instruction will be at interrupt vector 0.
0000 macro SSC
0000 db 0
0000 DAC6_1_OFF: equ 00h
0001 DAC6_1_LOWPOWER: equ 01h
0002 DAC6_1_MEDPOWER: equ 02h
0003 DAC6_1_HIGHPOWER: equ 03h
0000
0080 DAC6_1_CR0: equ 80h
0081 DAC6_1_CR1: equ 81h
0082 DAC6_1_CR2: equ 82h
0083 DAC6_1_CR3: equ 83h
0000
0004 DAC6_1_OffsetBinary: equ 04h
0002 DAC6_1_TwosComplement: equ 02h
0001 DAC6_1_SignAndMagnitude: equ 01h
0000 DAC6_1_RawRegister: equ 00h
0000
0003 DAC6_1_DATAFORMAT: equ 3h
0000 DAC6_1_OFFSETBINARY: equ DAC6_1_DATAFORMAT & DAC6_1_OffsetBinary
0002 DAC6_1_TWOSCOMPLEMENT: equ DAC6_1_DATAFORMAT & DAC6_1_TwosComplement
0001 DAC6_1_SIGNANDMAGNITUDE: equ DAC6_1_DATAFORMAT & DAC6_1_SignAndMagnitude
0000
0000 DAC6_1_PHASE_Normal: equ 0
0001 DAC6_1_PHASE_Swapped: equ 1
0000 DAC6_1_PHASE_SWAP: equ DAC6_1_PHASE_Normal
0000
IF DAC6_1_PHASE_SWAP
DAC6_1_CR0_HIBITS: equ C0h
ELSE
0080 DAC6_1_CR0_HIBITS: equ 80h
ENDIF
0000 DAC6_2_OFF: equ 00h
0001 DAC6_2_LOWPOWER: equ 01h
0002 DAC6_2_MEDPOWER: equ 02h
0003 DAC6_2_HIGHPOWER: equ 03h
0000
0098 DAC6_2_CR0: equ 98h
0099 DAC6_2_CR1: equ 99h
009A DAC6_2_CR2: equ 9ah
009B DAC6_2_CR3: equ 9bh
0000
0004 DAC6_2_OffsetBinary: equ 04h
0002 DAC6_2_TwosComplement: equ 02h
0001 DAC6_2_SignAndMagnitude: equ 01h
0000 DAC6_2_RawRegister: equ 00h
0000
0003 DAC6_2_DATAFORMAT: equ 3h
0000 DAC6_2_OFFSETBINARY: equ DAC6_2_DATAFORMAT & DAC6_2_OffsetBinary
0002 DAC6_2_TWOSCOMPLEMENT: equ DAC6_2_DATAFORMAT & DAC6_2_TwosComplement
0001 DAC6_2_SIGNANDMAGNITUDE: equ DAC6_2_DATAFORMAT & DAC6_2_SignAndMagnitude
0000
0000 DAC6_2_PHASE_Normal: equ 0
0001 DAC6_2_PHASE_Swapped: equ 1
0000 DAC6_2_PHASE_SWAP: equ DAC6_2_PHASE_Normal
0000
IF DAC6_2_PHASE_SWAP
DAC6_2_CR0_HIBITS: equ C0h
ELSE
0080 DAC6_2_CR0_HIBITS: equ 80h
ENDIF
0000 Buffer_OFF: equ 0
0001 Buffer_LOWPOWER: equ 1
0002 Buffer_MEDPOWER: equ 2
0003 Buffer_HIGHPOWER: equ 3
0000
0008 Buffer_G16_0: equ 08h
0018 Buffer_G8_00: equ 18h
0028 Buffer_G5_33: equ 28h
0038 Buffer_G4_00: equ 38h
0048 Buffer_G3_20: equ 48h
0058 Buffer_G2_67: equ 58h
0068 Buffer_G2_27: equ 68h
0078 Buffer_G2_00: equ 78h
0088 Buffer_G1_78: equ 88h
0098 Buffer_G1_60: equ 98h
00A8 Buffer_G1_46: equ A8h
00B8 Buffer_G1_33: equ B8h
00C8 Buffer_G1_23: equ C8h
00D8 Buffer_G1_14: equ D8h
00E8 Buffer_G1_06: equ E8h
00F8 Buffer_G1_00: equ F8h
00E0 Buffer_G0_93: equ E0h
00D0 Buffer_G0_87: equ D0h
00C0 Buffer_G0_81: equ C0h
00B0 Buffer_G0_75: equ B0h
00A0 Buffer_G0_68: equ A0h
0090 Buffer_G0_62: equ 90h
0080 Buffer_G0_56: equ 80h
0070 Buffer_G0_50: equ 70h
0060 Buffer_G0_43: equ 60h
0050 Buffer_G0_37: equ 50h
0040 Buffer_G0_31: equ 40h
0030 Buffer_G0_25: equ 30h
0020 Buffer_G0_18: equ 20h
0010 Buffer_G0_12: equ 10h
0000 Buffer_G0_06: equ 00h
0000
0079 Buffer_GAIN_CR0: equ 79h
007A Buffer_GAIN_CR1: equ 7ah
007B Buffer_GAIN_CR2: equ 7bh
0000
export _main
0000 _main:
0000 5003 mov A,Buffer_HIGHPOWER
0002 9000 call Buffer_Start
0004
0004 5003 mov A,DAC6_1_HIGHPOWER
0006 9000 call DAC6_1_Start
0008
0008 5003 mov A,DAC6_2_HIGHPOWER
000A 9000 call DAC6_2_Start
000C
000C 50E1 mov A,-31
000E 9000 call DAC6_1_WriteStall
0010
0010 50E1 mov A,-31
0012 9000 call DAC6_2_WriteStall
0014 loop:
0014 8FFF jmp loop
0016 7F ret
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?