boot.asm

Application Note Abstract The unique configuration of the PSoC&reg switched capacitor blocks allows

    ;-------------------------------------------------------------------------
    ; default CT block RTopMux to OUT and RBotMux to AGND
    ;-------------------------------------------------------------------------

    mov reg[ACA00CR0],05h
    mov reg[ACA01CR0],05h
    mov reg[ACA02CR0],05h
    mov reg[ACA03CR0],05h

    ;-------------------------------------------------------------------------
    ; All the user selections and UserModule selections are now loaded.
    ; !!! Except CPU frequency !!!! (CPU is runing at 12 MHz)
    ;-------------------------------------------------------------------------

Config: 
    lcall LoadConfigInit           ; Configure PSoC blocks per Dev Editor


IF (C_LANGUAGE_SUPPORT)
    call InitCRunTime              ; Initialize for C language
ENDIF ;(C_LANGUAGE_SUPPORT)

    mov reg[INT_VC],0              ; Clear any pending interrupts which may
                                   ; have been set during the boot process. 

    ;-------------------------------------------------------------------------
    ; We always enable LVD / Voltage Monitoring by default
    ;-------------------------------------------------------------------------

    M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only

IF (SWITCH_MODE_PUMP ^ 1) ; !!! This value is 1 if the SMP is disabled !!!
    ;-------------------------------------------------------------------------
    ; Pump is enabled, and customer requests it to work. Vcc is currently at
    ; or is slewing towards customer's requested Vcc.
    ;-------------------------------------------------------------------------

IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz) ; Clock is not 24MHz
    ;-------------------------------------------------------------------------
    ; < 24 MHz operation is requested. Any reasonable Vcc is OK.
    ;-------------------------------------------------------------------------

ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
    ;-------------------------------------------------------------------------
    ; 24 MHz operation is requested. Requires 5V operation.
    ; Only 07h setting is valid (04h | 03h)
    ;-------------------------------------------------------------------------

IF (SUPPLY_VOLTAGE)
    ;-------------------------------------------------------------------------
    ; 4.19 thru 5.0 V is selected
    ;-------------------------------------------------------------------------

IF (TRIP_VOLTAGE ^ 07h)
    ERROR_PSoC TRIP_VOLTAGE must be 4.64V(5.00V) for 24 MHz operation

ENDIF ;(TRIP_VOLTAGE ^ 07h)

ELSE ;!(SUPPLY_VOLTAGE)
    ERROR_PSoC Only valid SMP setting is 5.0 V

ENDIF ;(SUPPLY_VOLTAGE)
ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)

    ;-------------------------------------------------------------------------
    ; But must wait for the SMP to slew from 3.1 to 5 Volts, if SMP selected.
    ;-------------------------------------------------------------------------
    M8C_EnableIntMask INT_MSK0, INT_MSK0_Sleep

IF (SUPPLY_VOLTAGE)
    M8C_SetBank1
    mov reg[OSC_CR0], OSC_CR0_Sleep_512Hz
    M8C_SetBank0

    M8C_ClearWDTAndSleep        ; Reset the sleep timer

    mov reg[INT_VC],0           ; Clear all pending interrupts
.WaitFor2ms:
    mov A, reg[INT_VC]          ; read Interrupt Vector
    jz .WaitFor2ms              ; TimeOut occurs on Sleep Timer 2ms
ENDIF ;(SUPPLY_VOLTAGE)

    ;-------------------------------------------------------------------------
    ; Vcc is Stable and Correct, at 5V range. Setup LVD for Brownout
    ;-------------------------------------------------------------------------

    M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only

ELSE ;!(SWITCH_MODE_PUMP ^ 1) ; SMP is disabled
    ;-------------------------------------------------------------------------
    ; Normal operation with no pump.
    ;-------------------------------------------------------------------------

    M8C_EnableIntMask INT_MSK0, INT_MSK0_VoltageMonitor	; LVD only

IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
    ;-------------------------------------------------------------------------
    ; < 24 MHz operation is requested. Any reasonable Vcc is OK.
    ;-------------------------------------------------------------------------

ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
    ;-------------------------------------------------------------------------
    ; 24 MHz operation is requested. Requires 5V operation.
    ;-------------------------------------------------------------------------

IF (SUPPLY_VOLTAGE)
    ; Set the CPU speed to 93.75kHz in order to slow down INT_VC read
    M8C_SetBank1
    mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_93d7kHz)
.LVDLoop: 
    M8C_SetBank1
    mov reg[VLT_CR], 00h     ; LVD at 2.95 V (Power Good if >2.95V)
    M8C_SetBank0
    mov reg[INT_VC],0        ; Clear LVD interrupt
    M8C_SetBank1
    mov reg[VLT_CR], 07h     ; Force LVD at 4.64 V (Power Not good if <4.64V)
    M8C_SetBank0             ; Must wait 10 usec before reading INT_VC
    mov A, reg[INT_VC]
    jz .GoodVcc
    jmp .LVDLoop             ; Wait for good Vcc
.GoodVcc:
    ;-------------------------------------------------------------------------
    ; Leave LVD at 4.64 V (Required, no exceptions)
    ;-------------------------------------------------------------------------

ELSE ;!(SUPPLY_VOLTAGE)

    ERROR_PSoC 24 MHz at other than 5V is invalid.

ENDIF ;(SUPPLY_VOLTAGE)
ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
ENDIF ;(SWITCH_MODE_PUMP ^ 1)

    ;-------------------------------------------------------------------------
    ; Disable the Sleep interrupt that was used for timing above.
    ;-------------------------------------------------------------------------
    M8C_DisableIntMask INT_MSK0, INT_MSK0_Sleep

    ;-------------------------------------------------------------------------
    ; Everything has started OK. Now select requested CPU & sleep frequency.
    ;-------------------------------------------------------------------------

    M8C_SetBank1
    mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
    M8C_SetBank0

    ;-------------------------------------------------------------------------
    ; Global Interrupt are NOT enabled, this should be done in main().
    ; LVD is set but will not occur unless Global Interrupts are enabled. 
    ; Global Interrupts should be as soon as possible in main().
    ;-------------------------------------------------------------------------

    lcall _main                    ; Call main

__Exit:
    jmp __Exit                    ; Wait here till power is turned off



;-----------------------------------------------------------------------------
; C Runtime Environment Initialization
; The following code is conditionally assembled.
;-----------------------------------------------------------------------------

IF (C_LANGUAGE_SUPPORT)

InitCRunTime:
    ;-----------------------------
    ; clear bss segment
    ;-----------------------------
    mov A,0
    mov [__r0],<__bss_start
BssLoop:
    cmp [__r0],<__bss_end
    jz BssDone
    mvi [__r0],A
    jmp BssLoop
BssDone:
    ;----------------------------
    ; copy idata to data segment
    ;----------------------------
    mov A,>__idata_start
    mov X,<__idata_start
    mov [__r0],<__data_start
IDataLoop:
    cmp [__r0],<__data_end
    jz IDataDone
    push A
    romx
    mvi [__r0],A
    pop A
    inc X
    adc A,0
    jmp IDataLoop
IDataDone:
    ret

ENDIF ;(C_LANGUAGE_SUPPORT)


;------------------------------------------------------
; RAM segments for C CONST, static & global items
;------------------------------------------------------

    AREA lit
__lit_start:

    AREA idata
__idata_start:

    AREA func_lit
__func_lit_start:

    AREA psoc_config(rom)
__psoc_config_start:

;---------------------------------------------
;         CODE segment for general use
;---------------------------------------------
    AREA text(rom)
__text_start:

;---------------------------------------------
;         Begin RAM area usage
;---------------------------------------------
    AREA data(ram)
__data_start:

    AREA virtual_registers(ram)
__virtual_registers_end:

;---------------------------------------------
;         RAM segment for general use
;---------------------------------------------
    AREA bss(ram)
__bss_start:

;end of file