📄 boot.lis
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.WaitFor1s:
mov A, reg[INT_VC] ; read Interrupt Vector
jz .WaitFor1s ; TimeOut occurs on Sleep Timer 1s
or F, FlagXIOMask
mov reg[ILO_TR], 40h ; turn off the ILO, 32K is now from the ECO
and F, ~FlagXIOMask
ELSE ;!(SELECT_32K & WAIT_FOR_32K)
004F 62E000 mov reg[INT_MSK0], 0 ; Turn off all interrupts
0052 62E100 mov reg[INT_MSK1], 0 ; some could be on if s/w reset took place
0055 7110 or F, FlagXIOMask
0057 62E01A mov reg[OSC_CR0], (OSC_CR0_Sleep_1Hz | OSC_CR0_CPU_12MHz)
005A 70EF and F, ~FlagXIOMask
005C 62E338 mov reg[RES_WDT], 38h
005F
ENDIF ;(SELECT_32K & WAIT_FOR_32K)
;-------------------------------------------------------------------------
; Crystal is now fully operational.
;-------------------------------------------------------------------------
IF (PLL_MODE)
IF (SELECT_32K)
or F, FlagXIOMask
mov reg[OSC_CR0], (PLL_MODE_JUST | OSC_CR0_Sleep_64Hz | SELECT_32K_JUST | OSC_CR0_CPU_12MHz)
and F, ~FlagXIOMask
mov reg[RES_WDT], 38h
mov reg[INT_VC],0 ; Clear all pending interrupts
.WaitFor16ms:
mov A, reg[INT_VC] ; read Interrupt Vector
jz .WaitFor16ms ; TimeOut occurs on Sleep Timer 16ms
ELSE ;!(SELECT_32K)
ERROR_PSoC Using the PLL without the Crystal is invalid.
ENDIF ;(SELECT_32K)
ENDIF ;(PLL_MODE)
;-------------------------------------------------------------------------
; default CT block RTopMux to OUT and RBotMux to AGND
;-------------------------------------------------------------------------
005F 627105 mov reg[ACA00CR0],05h
0062 627505 mov reg[ACA01CR0],05h
0065 627905 mov reg[ACA02CR0],05h
0068 627D05 mov reg[ACA03CR0],05h
006B
006B ;-------------------------------------------------------------------------
006B ; All the user selections and UserModule selections are now loaded.
006B ; !!! Except CPU frequency !!!! (CPU is runing at 12 MHz)
006B ;-------------------------------------------------------------------------
006B
006B Config:
006B 7C0000 lcall LoadConfigInit ; Configure PSoC blocks per Dev Editor
006E
006E
IF (C_LANGUAGE_SUPPORT)
006E 903E call InitCRunTime ; Initialize for C language
ENDIF ;(C_LANGUAGE_SUPPORT)
0070 62E200 mov reg[INT_VC],0 ; Clear any pending interrupts which may
0073 ; have been set during the boot process.
0073
0073 ;-------------------------------------------------------------------------
0073 ; We always enable LVD / Voltage Monitoring by default
0073 ;-------------------------------------------------------------------------
0073
0073 43E001 or reg[INT_MSK0], INT_MSK0_VoltageMonitor
0076
IF (SWITCH_MODE_PUMP ^ 1) ; !!! This value is 1 if the SMP is disabled !!!
;-------------------------------------------------------------------------
; Pump is enabled, and customer requests it to work. Vcc is currently at
; or is slewing towards customer's requested Vcc.
;-------------------------------------------------------------------------
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz) ; Clock is not 24MHz
;-------------------------------------------------------------------------
; < 24 MHz operation is requested. Any reasonable Vcc is OK.
;-------------------------------------------------------------------------
ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
;-------------------------------------------------------------------------
; 24 MHz operation is requested. Requires 5V operation.
; Only 07h setting is valid (04h | 03h)
;-------------------------------------------------------------------------
IF (SUPPLY_VOLTAGE)
;-------------------------------------------------------------------------
; 4.19 thru 5.0 V is selected
;-------------------------------------------------------------------------
IF (TRIP_VOLTAGE ^ 07h)
ERROR_PSoC TRIP_VOLTAGE must be 4.64V(5.00V) for 24 MHz operation
ENDIF ;(TRIP_VOLTAGE ^ 07h)
ELSE ;!(SUPPLY_VOLTAGE)
ERROR_PSoC Only valid SMP setting is 5.0 V
ENDIF ;(SUPPLY_VOLTAGE)
ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
;-------------------------------------------------------------------------
; But must wait for the SMP to slew from 3.1 to 5 Volts, if SMP selected.
;-------------------------------------------------------------------------
or reg[INT_MSK0], INT_MSK0_Sleep
IF (SUPPLY_VOLTAGE)
or F, FlagXIOMask
mov reg[OSC_CR0], OSC_CR0_Sleep_512Hz
and F, ~FlagXIOMask
mov reg[RES_WDT], 38h
mov reg[INT_VC],0 ; Clear all pending interrupts
.WaitFor2ms:
mov A, reg[INT_VC] ; read Interrupt Vector
jz .WaitFor2ms ; TimeOut occurs on Sleep Timer 2ms
ENDIF ;(SUPPLY_VOLTAGE)
;-------------------------------------------------------------------------
; Vcc is Stable and Correct, at 5V range. Setup LVD for Brownout
;-------------------------------------------------------------------------
or reg[INT_MSK0], INT_MSK0_VoltageMonitor
ELSE ;!(SWITCH_MODE_PUMP ^ 1) ; SMP is disabled
;-------------------------------------------------------------------------
; Normal operation with no pump.
;-------------------------------------------------------------------------
0076 43E001 or reg[INT_MSK0], INT_MSK0_VoltageMonitor
0079
IF (CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
;-------------------------------------------------------------------------
; < 24 MHz operation is requested. Any reasonable Vcc is OK.
;-------------------------------------------------------------------------
ELSE ;!(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
;-------------------------------------------------------------------------
; 24 MHz operation is requested. Requires 5V operation.
;-------------------------------------------------------------------------
IF (SUPPLY_VOLTAGE)
; Set the CPU speed to 93.75kHz in order to slow down INT_VC read
0079 7110 or F, FlagXIOMask
007B 62E007 mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | OSC_CR0_CPU_93d7kHz)
007E .LVDLoop:
007E 7110 or F, FlagXIOMask
0080 62E300 mov reg[VLT_CR], 00h ; LVD at 2.95 V (Power Good if >2.95V)
0083 70EF and F, ~FlagXIOMask
0085 62E200 mov reg[INT_VC],0 ; Clear LVD interrupt
0088 7110 or F, FlagXIOMask
008A 62E307 mov reg[VLT_CR], 07h ; Force LVD at 4.64 V (Power Not good if <4.64V)
008D 70EF and F, ~FlagXIOMask
008F 5DE2 mov A, reg[INT_VC]
0091 A003 jz .GoodVcc
0093 8FEA jmp .LVDLoop ; Wait for good Vcc
0095 .GoodVcc:
0095 ;-------------------------------------------------------------------------
0095 ; Leave LVD at 4.64 V (Required, no exceptions)
0095 ;-------------------------------------------------------------------------
0095
ELSE ;!(SUPPLY_VOLTAGE)
ERROR_PSoC 24 MHz at other than 5V is invalid.
ENDIF ;(SUPPLY_VOLTAGE)
ENDIF ;(CPU_CLOCK_JUST ^ OSC_CR0_CPU_24MHz)
ENDIF ;(SWITCH_MODE_PUMP ^ 1)
;-------------------------------------------------------------------------
; Disable the Sleep interrupt that was used for timing above.
;-------------------------------------------------------------------------
if DISABLE_INT_FIX
0095 5DFF mov A, reg[CPU_SCR] ; save the current Global interrupt state
0097 70FE and F, ~FlagGlobalIE
endif
0099 41E0BF and reg[INT_MSK0], ~INT_MSK0_Sleep ; disable specified interrupt enable bit
if DISABLE_INT_FIX
009C 2180 and A, CPUSCR_GIEMask ; determine if global interrupt was set
009E A003 jz . + 4 ; jump if global interrupt disabled
00A0 7101 or F, FlagGlobalIE
endif
;-------------------------------------------------------------------------
; Everything has started OK. Now select requested CPU & sleep frequency.
;-------------------------------------------------------------------------
00A2 7110 or F, FlagXIOMask
00A4 62E003 mov reg[OSC_CR0], (SELECT_32K_JUST | PLL_MODE_JUST | SLEEP_TIMER_JUST | CPU_CLOCK_JUST)
00A7 70EF and F, ~FlagXIOMask
00A9
00A9 ;-------------------------------------------------------------------------
00A9 ; Global Interrupt are NOT enabled, this should be done in main().
00A9 ; LVD is set but will not occur unless Global Interrupts are enabled.
00A9 ; Global Interrupts should be as soon as possible in main().
00A9 ;-------------------------------------------------------------------------
00A9
00A9 7C0000 lcall _main ; Call main
00AC
00AC __Exit:
00AC 8FFF jmp __Exit ; Wait here till power is turned off
00AE
00AE
00AE
00AE ;--⌨️ 快捷键说明
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