📄 rx8_1.lis
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0000 ; The next instruction to be executed depends on the state of the
0000 ; various interrupt enable bits. If some interrupts are enabled
0000 ; and the global interrupts are disabled, the next instruction will
0000 ; be the one that follows the invocation of this macro. If global
0000 ; interrupts are also enabled then the next instruction will be
0000 ; from the interrupt vector table. If no interrupts are enabled
0000 ; then RIP.
0000 macro M8C_Stop
0000 ; In general, you probably don't want to do this, but here's how:
0000 or reg[CPU_SCR], CPUSCR_StopMask
0000 ; Next instruction to be executed is located in the interrupt
0000 ; vector table entry for Power-On Reset.
0000 macro M8C_Reset
0000 ; Restore everything to the power-on reset state.
0000 mov A, 0
0000 SSC
0000 ; Next non-supervisor instruction will be at interrupt vector 0.
0000 macro SSC
0000 db 0
0040 bRX8_1_INT_MASK: equ 40h
0000 ;RX8 interrupt address
00E1 RX8_1_INT_REG: equ 0e1h
0000
0000 ;------------------------------------
0000 ; RX8 Parity masks
0000 ;------------------------------------
0000 RX8_PARITY_NONE: equ 0h
0002 RX8_PARITY_EVEN: equ 2h
0006 RX8_PARITY_ODD: equ 6h
0000
0000 ;------------------------------------
0000 ; RX8 Status Register masks
0000 ;------------------------------------
0000
0010 RX8_RX_ACTIVE: equ 10h
0008 RX8_RX_COMPLETE: equ 08h
0080 RX8_RX_PARITY_ERROR: equ 80h
0040 RX8_RX_OVERRUN_ERROR: equ 40h
0020 RX8_RX_FRAMING_ERROR: equ 20h
00E0 RX8_RX_NO_ERROR: equ E0h
0000
0000 ;---------------------------------
0000 ; Registers used by RX8
0000 ;---------------------------------
003B RX8_1_CONTROL_REG: equ 3bh ;Control register
0038 RX8_1_RX_SHIFT_REG: equ 38h ;RX Shift Register register
003A RX8_1_RX_BUFFER_REG: equ 3ah ;RX Buffer Register
0038 RX8_1_FUNC_REG: equ 38h ;Function register
0039 RX8_1_INPUT_REG: equ 39h ;Input register
003A RX8_1_OUTPUT_REG: equ 3ah ;Output register
0000
0000 ; end of file
0000
area text (ROM, REL)
;-------------------------------------------------------------------
; Declare the functions global for both assembler and C compiler.
;
; Note that there are two names for each API. First name is
; assembler reference. Name with underscore is name refence for
; C compiler. Calling function in C source code does not require
; the underscore.
;-------------------------------------------------------------------
export RX8_1_EnableInt
export _RX8_1_EnableInt
export RX8_1_DisableInt
export _RX8_1_DisableInt
export RX8_1_Start
export _RX8_1_Start
export RX8_1_Stop
export _RX8_1_Stop
export bRX8_1_ReadRxData
export _bRX8_1_ReadRxData
export bRX8_1_ReadRxStatus
export _bRX8_1_ReadRxStatus
;-----------
; EQUATES
;-----------
0001 bfCONTROL_REG_START_BIT: equ 1 ; Control register start bit
0000
0000 ;-----------------------------------------------------------------------------
0000 ; FUNCTION NAME: RX8_1_EnableInt
0000 ;
0000 ; DESCRIPTION:
0000 ; Enables this receiver's interrupt by setting the interrupt enable mask
0000 ; bit associated with this User Module. Remember to call the global interrupt
0000 ; enable function by using the macro: M8C_EnableGInt.
0000 ;
0000 ; ARGUMENTS:
0000 ; none.
0000 ;
0000 ; RETURNS:
0000 ; none.
0000 ;
0000 ; SIDE EFFECTS:
0000 ; none.
0000 ;
0000 ; THEORY of OPERATION:
0000 ; Sets the specific user module interrupt enable mask bit.
0000 ;
0000 ;-----------------------------------------------------------------------------
0000 RX8_1_EnableInt:
0000 _RX8_1_EnableInt:
0000 43E140 or reg[RX8_1_INT_REG], bRX8_1_INT_MASK
0003 7F ret
0004
0004
0004 ;-----------------------------------------------------------------------------
0004 ; FUNCTION NAME: RX8_1_DisableInt
0004 ;
0004 ; DESCRIPTION:
0004 ; Disables this RX8's interrupt by clearing the interrupt enable mask bit
0004 ; associated with this User Module.
0004 ;
0004 ; ARGUMENTS:
0004 ; none.
0004 ;
0004 ; RETURNS:
0004 ; none.
0004 ;
0004 ; SIDE EFFECTS:
0004 ; none.
0004 ;
0004 ; THEORY of OPERATION:
0004 ; Clears the specific user module interrupt enable mask bit.
0004 ;
0004 ;-----------------------------------------------------------------------------
0004 RX8_1_DisableInt:
0004 _RX8_1_DisableInt:
if DISABLE_INT_FIX
0004 5DFF mov A, reg[CPU_SCR] ; save the current Global interrupt state
0006 70FE and F, ~FlagGlobalIE
endif
0008 41E1BF and reg[RX8_1_INT_REG], ~bRX8_1_INT_MASK ; disable specified interrupt enable bit
if DISABLE_INT_FIX
000B 2180 and A, CPUSCR_GIEMask ; determine if global interrupt was set
000D A003 jz . + 4 ; jump if global interrupt disabled
000F 7101 or F, FlagGlobalIE
endif
0011 7F ret
0012
0012
0012 ;-----------------------------------------------------------------------------
0012 ; FUNCTION NAME: RX8_1_Start(BYTE bParity)
0012 ;
0012 ; DESCRIPTION:
0012 ; Sets the start bit and parity in the Control register of this user module.
0012 ;
0012 ; ARGUMENTS:
0012 ; BYTE bParity - parity of received data. Use defined masks.
0012 ; passed in A register.
0012 ;
0012 ; RETURNS:
0012 ; none.
0012 ;
0012 ; SIDE EFFECTS:
0012 ; none.
0012 ;
0012 ; THEORY of OPERATION:
0012 ; Set the specified parity and start bits in the Control register.
0012 ;
0012 ;-----------------------------------------------------------------------------
0012 RX8_1_Start:
0012 _RX8_1_Start:
0012 2901 or A, bfCONTROL_REG_START_BIT
0014 603B mov REG[RX8_1_CONTROL_REG], A
0016 7F ret
0017
0017
0017 ;-----------------------------------------------------------------------------
0017 ; FUNCTION NAME: RX8_1_Stop
0017 ;
0017 ; DESCRIPTION:
0017 ; Disables RX8 operation.
0017 ;
0017 ; ARGUMENTS:
0017 ; none.
0017 ;
0017 ; RETURNS:
0017 ; none.
0017 ;
0017 ; SIDE EFFECTS:
0017 ; none.
0017 ;
0017 ; THEORY of OPERATION:
0017 ; Clear the start bit in the Control register.
0017 ;
0017 ;-----------------------------------------------------------------------------
0017 RX8_1_Stop:
0017 _RX8_1_Stop:
0017 413BFE and REG[RX8_1_CONTROL_REG], ~bfCONTROL_REG_START_BIT
001A 7F ret
001B
001B
001B ;-----------------------------------------------------------------------------
001B ; FUNCTION NAME: bRX8_1_ReadRxData
001B ;
001B ; DESCRIPTION:
001B ; Reads the RX buffer register. Should check the status regiser to make
001B ; sure data is valid.
001B ;
001B ; ARGUMENTS:
001B ; none.
001B ;
001B ; RETURNS:
001B ; bRxData - returned in A.
001B ;
001B ; SIDE EFFECTS:
001B ; none.
001B ;
001B ; THEORY of OPERATION:
001B ; none.
001B ;
001B ;-----------------------------------------------------------------------------
001B bRX8_1_ReadRxData:
001B _bRX8_1_ReadRxData:
001B 5D3A mov A, REG[RX8_1_RX_BUFFER_REG]
001D 7F ret
001E
001E
001E ;-----------------------------------------------------------------------------
001E ; FUNCTION NAME: bRX8_1_ReadRxStatus
001E ;
001E ; DESCRIPTION:
001E ; Reads the RX Status bits in the Control/Status register.
001E ;
001E ; ARGUMENTS:
001E ; none.
001E ;
001E ; RETURNS:
001E ; BYTE bRXStatus - transmit status data. Use the following defined bits
001E ; masks: RX_COMPLETE and RX_BUFFER_EMPTY
001E ; returned in A.
001E ;
001E ; SIDE EFFECTS:
001E ; none.
001E ;
001E ; THEORY of OPERATION:
001E ; Read the status and control register.
001E ;
001E ;-----------------------------------------------------------------------------
001E bRX8_1_ReadRxStatus:
001E _bRX8_1_ReadRxStatus:
001E 5D3B mov A, REG[RX8_1_CONTROL_REG]
0020 7F ret
0021
0021
0021 ; end of RX8 API code
0021
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