📄 uart.lst
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1 .file "uart.c"
9 .Ltext0:
10 .align 2
11 .global uart0Init
13 uart0Init:
14 .LFB2:
15 .file 1 "uart.c"
1:uart.c **** /* *****************************************************************************
2:uart.c **** *
3:uart.c **** * $RCSfile: $
4:uart.c **** * $Revision: $
5:uart.c **** *
6:uart.c **** * This module provides interface routines to the LPC ARM UARTs.
7:uart.c **** * Copyright 2004, R O SoftWare
8:uart.c **** * No guarantees, warrantees, or promises, implied or otherwise.
9:uart.c **** * May be used for hobby or commercial purposes provided copyright
10:uart.c **** * notice remains intact.
11:uart.c **** *
12:uart.c **** * reduced to see what has to be done for minimum UART-support by mthomas
13:uart.c **** *****************************************************************************/
14:uart.c ****
15:uart.c **** // #warning "this is a reduced version of the R O Software code"
16:uart.c ****
17:uart.c **** #include <arch/philips/lpc2119.h>
18:uart.c **** #include "uart.h"
19:uart.c ****
20:uart.c **** /* on LPC210x: UART0 TX-Pin=P0.2, RX-Pin=P0.1
21:uart.c **** PINSEL0 has to be set to "UART-Function" = Function "01"
22:uart.c **** for Pin 0.0 and 0.1 */
23:uart.c ****
24:uart.c **** #define PINSEL_BITPIN0 0
25:uart.c **** #define PINSEL_BITPIN1 2
26:uart.c **** // #define PINSEL_BITPIN2 4
27:uart.c **** #define PINSEL_FIRST_ALT_FUNC 1
28:uart.c **** // #define PINSEL_SECOND_ALT_FUNC 2
29:uart.c ****
30:uart.c **** // Values of Bits 0-3 in PINSEL to activate UART0
31:uart.c **** #define UART0_PINSEL ((PINSEL_FIRST_ALT_FUNC<<PINSEL_BITPIN0)|(PINSEL_FIRST_ALT_FUNC<<PINSEL_BIT
32:uart.c **** // Mask of Bits 0-4
33:uart.c **** #define UART0_PINMASK (0x0000000F) /* PINSEL0 Mask for UART0 */
34:uart.c ****
35:uart.c **** // U0_LCR devisor latch bit
36:uart.c **** #define UART0_LCR_DLAB 7
37:uart.c ****
38:uart.c **** /* baudrate divisor - use UART_BAUD macro
39:uart.c **** * mode - see typical modes (uart.h)
40:uart.c **** * fmode - see typical fmodes (uart.h)
41:uart.c **** * NOTE: uart0Init(UART_BAUD(9600), UART_8N1, UART_FIFO_8);
42:uart.c **** */
43:uart.c **** void uart0Init(uint16_t baud, uint8_t mode, uint8_t fmode)
44:uart.c **** {
16 args = 0, pretend = 0, frame = 0
17 @ frame_needed = 0, uses_anonymous_args = 0
18 .LVL0:
19 stmfd sp!, {r4, r5, lr}
20 0000 30402DE9 .LCFI0:
21 .loc 1 48 0
45:uart.c **** // setup Pin Function Select Register (Pin Connect Block)
46:uart.c **** // make sure old values of Bits 0-4 are masked out and
47:uart.c **** // set them according to UART0-Pin-Selection
48:uart.c **** PCB_PINSEL0 = (PCB_PINSEL0 & ~UART0_PINMASK) | UART0_PINSEL;
22 5, .L3
23 0004 50509FE5 ldr lr, [r5, #0]
24 0008 00E095E5 .loc 1 50 0
49:uart.c ****
50:uart.c **** UART0_IER = 0x00; // disable all interrupts
25 r ip, .L3+4
26 000c 4CC09FE5 .loc 1 48 0
27 bic lr, lr, #15
28 0010 0FE0CEE3 .loc 1 50 0
29 mov r3, #0
30 0014 0030A0E3 .loc 1 57 0
51:uart.c **** UART0_IIR = 0x00; // clear interrupt ID register
52:uart.c **** UART0_LSR = 0x00; // clear line status register
53:uart.c ****
54:uart.c **** // set the baudrate - DLAB must be set to access DLL/DLM
55:uart.c **** UART0_LCR = (1<<UART0_LCR_DLAB); // set divisor latches (DLAB)
56:uart.c **** UART0_DLL = (uint8_t)baud; // set for baud low byte
57:uart.c **** UART0_DLM = (uint8_t)(baud >> 8); // set for baud high byte
31 4, r0, lsr #8
32 0018 2044A0E1 .loc 1 48 0
33 orr lr, lr, #5
34 001c 05E08EE3 str lr, [r5, #0]
35 0020 00E085E5 .loc 1 44 0
36 and r2, r2, #255
37 0024 FF2002E2 .loc 1 50 0
38 str r3, [ip, #4]
39 0028 04308CE5 .loc 1 57 0
40 and r4, r4, #255
41 002c FF4004E2 .loc 1 51 0
42 str r3, [ip, #8]
43 0030 08308CE5 .loc 1 62 0
58:uart.c ****
59:uart.c **** // set the number of characters and other
60:uart.c **** // user specified operating parameters
61:uart.c **** // Databits, Parity, Stopbits - Settings in Line Control Register
62:uart.c **** UART0_LCR = (mode & ~(1<<UART0_LCR_DLAB)); // clear DLAB "on-the-fly"
44 #127
45 0034 7F1001E2 .LVL1:
46 .loc 1 52 0
47 str r3, [ip, #20]
48 0038 14308CE5 .loc 1 56 0
49 and r0, r0, #255
50 003c FF0000E2 .LVL2:
51 .loc 1 55 0
52 add r3, r3, #128
53 0040 803083E2 str r3, [ip, #12]
54 0044 0C308CE5 .loc 1 56 0
55 str r0, [ip, #0]
56 0048 00008CE5 .loc 1 57 0
57 str r4, [ip, #4]
58 004c 04408CE5 .loc 1 62 0
59 str r1, [ip, #12]
60 0050 0C108CE5 .loc 1 64 0
63:uart.c **** // setup FIFO Control Register (fifo-enabled + xx trig)
64:uart.c **** UART0_FCR = fmode;
61
62 0054 08208CE5 .loc 1 65 0
65:uart.c **** }
63 ldmfd sp!, {r4, r5, pc}
64 0058 3080BDE8 .L4:
65 .align 2
66 .L3:
67 .word -536690688
68 005c 00C002E0 .word -536821760
69 0060 00C000E0 .LFE2:
71 .align 2
72 .global uart0Putch
74 uart0Putch:
75 .LFB4:
76 .loc 1 73 0
66:uart.c ****
67:uart.c **** void uart_sendchar(char c)
68:uart.c **** {
69:uart.c **** uart0Putch(c);
70:uart.c **** }
71:uart.c ****
72:uart.c **** int uart0Putch(int ch)
73:uart.c **** {
77 retend = 0, frame = 0
78 @ frame_needed = 0, uses_anonymous_args = 0
79 @ link register save eliminated.
80 .LVL3:
81 @ lr needed for prologue
82 .L7:
83 .loc 1 74 0
74:uart.c **** while (!(UART0_LSR & ULSR_THRE)) // wait for TX buffer to empty
84 , .L12
85 0064 14209FE5 ldr r3, [r2, #20]
86 0068 143092E5 tst r3, #32
87 006c 200013E3 beq .L7
88 0070 FBFFFF0A .loc 1 77 0
75:uart.c **** continue; // also either WDOG() or swap()
76:uart.c ****
77:uart.c **** UART0_THR = (uint8_t)ch; // put char to Transmit Holding Register
89 r0, r0, #255
90 0074 FF0000E2 .LVL4:
91 str r0, [r2, #0]
92 0078 000082E5 .loc 1 79 0
78:uart.c **** return (uint8_t)ch; // return char ("stdio-compatible"?)
79:uart.c **** }
93 lr
94 007c 1EFF2FE1 .L13:
95 .align 2
96 .L12:
97 .word -536821760
98 0080 00C000E0 .LFE4:
100 .align 2
101 .global uart_sendchar
103 uart_sendchar:
104 .LFB3:
105 .loc 1 68 0
106 @ args = 0, pretend = 0, frame = 0
107 @ frame_needed = 0, uses_anonymous_args = 0
108 @ link register save eliminated.
109 .LVL5:
110 and r0, r0, #255
111 0084 FF0000E2 @ lr needed for prologue
112 .loc 1 70 0
113 .loc 1 69 0
114 b uart0Putch
115 0088 FEFFFFEA .LVL6:
116 .LFE3:
118 .align 2
119 .global uart0Puts
121 uart0Puts:
122 .LFB5:
123 .loc 1 82 0
80:uart.c ****
81:uart.c **** const char *uart0Puts(const char *string)
82:uart.c **** {
124 = 0
125 @ frame_needed = 0, uses_anonymous_args = 0
126 .LVL7:
127 stmfd sp!, {r4, lr}
128 008c 10402DE9 .LCFI1:
129 .loc 1 82 0
130 mov r4, r0
131 0090 0040A0E1 b .L17
132 0094 030000EA .LVL8:
133 .L18:
134 .loc 1 86 0
83:uart.c **** char ch;
84:uart.c ****
85:uart.c **** while ((ch = *string)) {
86:uart.c **** if (uart0Putch(ch)<0) break;
135 tch
136 0098 FEFFFFEB .LVL9:
137 cmp r0, #0
138 009c 000050E3 blt .L19
139 00a0 030000BA .loc 1 87 0
87:uart.c **** string++;
140 r4, r4, #1
141 00a4 014084E2 .LVL10:
142 .L17:
143 .loc 1 85 0
144 ldrb r3, [r4, #0] @ zero_extendqisi2
145 00a8 0030D4E5 .LVL11:
146 subs r0, r3, #0
147 00ac 000053E2 bne .L18
148 00b0 F8FFFF1A .LVL12:
149 .L19:
150 .loc 1 91 0
88:uart.c **** }
89:uart.c ****
90:uart.c **** return string;
91:uart.c **** }
151
152 00b4 0400A0E1 .LVL13:
153 ldmfd sp!, {r4, pc}
154 00b8 1080BDE8 .LFE5:
156 .align 2
157 .global uart0TxEmpty
159 uart0TxEmpty:
160 .LFB6:
161 .loc 1 94 0
92:uart.c ****
93:uart.c **** int uart0TxEmpty(void)
94:uart.c **** {
162 0, pretend = 0, frame = 0
163 @ frame_needed = 0, uses_anonymous_args = 0
164 @ link register save eliminated.
165 .loc 1 95 0
95:uart.c **** return (UART0_LSR & (ULSR_THRE | ULSR_TEMT)) == (ULSR_THRE | ULSR_TEMT);
166 r3, .L24
167 00bc 14309FE5 ldr r0, [r3, #20]
168 00c0 140093E5 and r0, r0, #96
169 00c4 600000E2 .loc 1 96 0
96:uart.c **** }
170 r0, #96
171 00c8 600050E3 movne r0, #0
172 00cc 0000A013 moveq r0, #1
173 00d0 0100A003 .loc 1 94 0
174 @ lr needed for prologue
175 .loc 1 96 0
176 bx lr
177 00d4 1EFF2FE1 .L25:
178 .align 2
179 .L24:
180 .word -536821760
181 00d8 00C000E0 .LFE6:
183 .align 2
184 .global uart0TxFlush
186 uart0TxFlush:
187 .LFB7:
188 .loc 1 99 0
97:uart.c ****
98:uart.c **** void uart0TxFlush(void)
99:uart.c **** {
189 d = 0, frame = 0
190 @ frame_needed = 0, uses_anonymous_args = 0
191 @ link register save eliminated.
192 .loc 1 100 0
100:uart.c **** UART0_FCR |= UFCR_TX_FIFO_RESET; // clear the TX fifo
193 r2, .L28
194 00dc 0C209FE5 ldr r3, [r2, #8]
195 00e0 083092E5 orr r3, r3, #4
196 00e4 043083E3 .loc 1 99 0
197 @ lr needed for prologue
198 .loc 1 100 0
199 str r3, [r2, #8]
200 00e8 083082E5 .loc 1 101 0
101:uart.c **** }
201 L29:
202 00ec 1EFF2FE1 .align 2
203 .L28:
204 .word -536821760
205 .LFE7:
207 .align 2
208 .global uart0Getch
210 uart0Getch:
211 .LFB8:
212 .loc 1 106 0
213 @ args = 0, pretend = 0, frame = 0
102:uart.c ****
103:uart.c ****
104:uart.c **** /* Returns: character on success, -1 if no character is available */
105:uart.c **** int uart0Getch(void)
106:uart.c **** {
214 ed = 0, uses_anonymous_args = 0
215 @ link register save eliminated.
216 .loc 1 107 0
217 ldr r2, .L35
107:uart.c **** if (UART0_LSR & ULSR_RDR) // check if character is available
218 r3, [r2, #20]
219 00f4 10209FE5 tst r3, #1
220 00f8 143092E5 mvn r0, #0
221 00fc 010013E3 .loc 1 108 0
222 0100 0000E0E3 ldrne r0, [r2, #0]
108:uart.c **** return UART0_RBR; // return character
223 1 106 0
224 0104 00009215 @ lr needed for prologue
225 .loc 1 111 0
226 bx lr
109:uart.c ****
110:uart.c **** return -1;
111:uart.c **** }
227 :
228 0108 1EFF2FE1 .align 2
229 .L35:
230 .word -536821760
231 .LFE8:
233 .section .debug_frame,"",%progbits
234 .Lframe0:
326 .Ldebug_loc0:
DEFINED SYMBOLS
*ABS*:00000000 uart.c
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:13 .text:00000000 uart0Init
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:20 .text:00000000 $a
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:68 .text:0000005c $d
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:75 .text:00000064 uart0Putch
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:85 .text:00000064 $a
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:98 .text:00000080 $d
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:104 .text:00000084 uart_sendchar
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:111 .text:00000084 $a
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:122 .text:0000008c uart0Puts
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:160 .text:000000bc uart0TxEmpty
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:181 .text:000000d8 $d
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:187 .text:000000dc uart0TxFlush
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:194 .text:000000dc $a
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:206 .text:000000f0 $d
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:212 .text:000000f4 uart0Getch
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:219 .text:000000f4 $a
C:\DOKUME~1\root\LOKALE~1\Temp/cc0maaaa.s:232 .text:0000010c $d
NO UNDEFINED SYMBOLS
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