spim.asm

Cypress cy7c63318 鼠标开发板的源代码

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME: SPIM.asm
;;   Version: 1.0, Updated on 2005/04/26 at 21:25:53
;;  Generated by PSoC Designer ver 4.2  b1013 : 02 September, 2004
;;
;;  DESCRIPTION: SPIM User Module software implementation file
;;               for CY7C638xx, CY7C639xx and related devices.
;;
;;  NOTE: User Module APIs conform to the fastcall16 convention for marshalling
;;        arguments and observe the associated "Registers are volatile" policy.
;;        This means it is the caller's responsibility to preserve any values
;;        in the X and A registers that are still needed after the API functions
;;        returns. For Large Memory Model devices it is also the caller's 
;;        responsibility to perserve any value in the CUR_PP, IDX_PP, MVR_PP and 
;;        MVW_PP registers. Even though some of these registers may not be modified
;;        now, there is no guarantee that will remain the case in future releases.
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2000-2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************

include "m8c.inc"
include "memory.inc"
include "SPIM.inc"

;-----------------------------------------------
;  Global Symbols
;-----------------------------------------------
export   SPIM_EnableInt
export  _SPIM_EnableInt
export   SPIM_DisableInt
export  _SPIM_DisableInt
export   SPIM_Start
export  _SPIM_Start
export   SPIM_Stop
export  _SPIM_Stop
export   SPIM_SetMOSI
export  _SPIM_SetMOSI
export   SPIM_SetMISO
export  _SPIM_SetMISO
export   SPIM_bIO
export  _SPIM_bIO

;-----------------------------------------------
;  Constant Definitions
;-----------------------------------------------
area UserModules (ROM, REL)

.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_EnableInt
;
;  DESCRIPTION:
;    Enables this SPIM's interrupts by setting both the RX and TX interrupt
;    masks.
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:  none
;
;  RETURNS:  none
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;    Enables the SPI RX and TX interrupts
;-----------------------------------------------------------------------------
 SPIM_EnableInt:
_SPIM_EnableInt:
    RAM_PROLOGUE RAM_USE_CLASS_1
    M8C_EnableIntMask INT_MSK0, (INT_MSK0_SPI_RX | INT_MSK0_SPI_TX)
    RAM_EPILOGUE RAM_USE_CLASS_1
    RET
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_DisableInt
;
;  DESCRIPTION:
;    Disables this SPIM's interrupt by clearing both the RX and TX interrupt
;    masks.
;
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:  none
;
;  RETURNS:  none
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;    Disables the SPI RX and TX interrupts
;-----------------------------------------------------------------------------
 SPIM_DisableInt:
_SPIM_DisableInt:
    RAM_PROLOGUE RAM_USE_CLASS_1
    M8C_DisableIntMask INT_MSK0, (INT_MSK0_SPI_RX | INT_MSK0_SPI_TX)
    RAM_EPILOGUE RAM_USE_CLASS_1
    RET
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_Start
;
;  DESCRIPTION:
;
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:    none
;
;  RETURNS:  none
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;        Included for completeness
;-----------------------------------------------------------------------------
 SPIM_Start:
_SPIM_Start:
   RAM_PROLOGUE RAM_USE_CLASS_1
   RAM_EPILOGUE RAM_USE_CLASS_1
   RET
.ENDSECTION

.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_Stop
;
;  DESCRIPTION:
;     Disables SPIM operation.
;
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:  none
;
;  RETURNS:  none
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;     Clear the start bit in the Control register.
;-----------------------------------------------------------------------------
 SPIM_Stop:
_SPIM_Stop:
   RAM_PROLOGUE RAM_USE_CLASS_1
   RAM_EPILOGUE RAM_USE_CLASS_1
   RET
.ENDSECTION
.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_SetMOSI (_SetMISO)
;
;  DESCRIPTION:
;     Uses the SPI configuration setting 'SWAP' to set the MOSI/MISO pin
;
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:  A:    0x00--SPIM_MOSI_P15 (SPIM_MISO_P16) 
;                    0x01--SPIM_MOSI_P16 (SPIM_MISO_P15)
;
;  RETURNS:  none
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;     
;-----------------------------------------------------------------------------
 SPIM_SetMOSI:
_SPIM_SetMOSI:
 SPIM_SetMISO:
_SPIM_SetMISO:
    RAM_PROLOGUE RAM_USE_CLASS_1
    AND    A, 0x01                     ; Set or Clear SWAP?
    JZ     .clear                      ; Jump to clear SWAP
; Flow here to set SWAP
    OR     REG[SPICR], SPIM_SWAP       ; Set swap
    RET                                ; Quick exit
; Jump here to clear SWAP
.clear:
    AND    REG[SPICR], ~(SPIM_SWAP)    ; Clear swap
    RAM_EPILOGUE RAM_USE_CLASS_1
    RET
.ENDSECTION

.SECTION
;-----------------------------------------------------------------------------
;  FUNCTION NAME: SPIM_bIO
;
;  DESCRIPTION:
;     Initiates an SPI data transfer and returns the received data byte
;
;-----------------------------------------------------------------------------
;
;  ARGUMENTS:
;     BYTE  bTxData - data to transmit.
;        Passed in Accumulator.
;
;  RETURNS:  A contains the SPIDATA register value (following SPI RX complete) 
;
;  SIDE EFFECTS: 
;    The A and X registers may be modified by this or future implementations
;    of this function.  The same is true for all RAM page pointer registers in
;    the Large Memory Model.  When necessary, it is the calling function's
;    responsibility to perserve their values across calls to fastcall16 
;    functions.
;
;  THEORY of OPERATION or PROCEDURE:
;     Writes data to the SPIDATA register and returns the received data.
;-----------------------------------------------------------------------------
 SPIM_bIO:
_SPIM_bIO:
    RAM_PROLOGUE RAM_USE_CLASS_1
    M8C_DisableGInt
    AND    REG[INT_CLR0],~(INT_MSK0_SPI_TX | INT_MSK0_SPI_RX) ; Clear the TX and RX flag?
    MOV    REG[SPIDATA], A             ; Write the address
    ; Wait for the address write to complete
.w1:
    TST    REG[INT_CLR0],INT_MSK0_SPI_RX ; Address transfer complete?
    JZ     .w1                         ; Wait some more        
; Get the sampled data
    MOV    A, REG[SPIDATA]             ; Return the data
    M8C_EnableGInt
    RAM_EPILOGUE RAM_USE_CLASS_1
    RET
.ENDSECTION
; End of File SPIM.asm