📄 psocconfig.lis
字号:
0000 push A
0000 macro REG_RESTORE( IOReg )
0000 pop A
0000 mov reg[ @IOReg ], A
0000 macro ISR_PRESERVE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_PRESERVE CUR_PP
0000 REG_PRESERVE IDX_PP
0000 REG_PRESERVE MVR_PP
0000 REG_PRESERVE MVW_PP
0000 ENDIF
0000 macro ISR_RESTORE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_RESTORE MVW_PP
0000 REG_RESTORE MVR_PP
0000 REG_RESTORE IDX_PP
0000 REG_RESTORE CUR_PP
0000 ENDIF
0000 CPU_CLOCK: equ 0h ;CPU Clock value
0001 CPU_CLOCK_MASK: equ 1h ;CPU Clock mask
0000 CPU_CLOCK_JUST: equ 0h ;CPU Clock value justified
0000
0001 CPU_CLOCK_SPEED: equ 1h ;CPU Clock Speed value
0003 CPU_CLOCK_SPEED_MASK: equ 3h ;CPU Clock Speed mask
0001 CPU_CLOCK_SPEED_JUST: equ 1h ;CPU Clock Speed value justified
0000
0002 TIMER_CLOCK: equ 2h ;Timer Clock value
0003 TIMER_CLOCK_MASK: equ 3h ;Timer Clock mask
0002 TIMER_CLOCK_JUST: equ 2h ;Timer Clock value justified
0000
0000 TIMER_CLOCK_SPEED: equ 0h ;Timer clock speed value
000C TIMER_CLOCK_SPEED_MASK: equ ch ;Timer clock speed mask
0000 TIMER_CLOCK_SPEED_JUST: equ 0h ;Timer clock speed value justified
0000
0000 CAPT_CLOCK: equ 0h ;Capture Clock value
0030 CAPT_CLOCK_MASK: equ 30h ;Capture Clock mask
0000 CAPT_CLOCK_JUST: equ 0h ;Capture Clock value justified
0000
0002 CAPT_CLOCK_SPEED: equ 2h ;Capture Clock speed value
00C0 CAPT_CLOCK_SPEED_MASK: equ c0h ;Capture Clock speed mask
0080 CAPT_CLOCK_SPEED_JUST: equ 80h ;Capture Clock speed value justified
0000
0000 CAPT_EDGE: equ 0h ;Capture Edge value
0080 CAPT_EDGE_MASK: equ 80h ;Capture Edge mask
0000 CAPT_EDGE_JUST: equ 0h ;Capture Edge value justified
0000
0000 CAPT_PRESCALE: equ 0h ;Capture Prescale value
0070 CAPT_PRESCALE_MASK: equ 70h ;Capture Prescale mask
0000 CAPT_PRESCALE_JUST: equ 0h ;Capture Prescale value justified
0000
0000 USB_CLOCK: equ 0h ;USB Clock source value
0020 USB_CLOCK_MASK: equ 20h ;USB Clock source mask
0000 USB_CLOCK_JUST: equ 0h ;USB Clock source justified
0000
0000 USB_CLOCK_SPEED: equ 0h ;USB Clock div by 2 value
0040 USB_CLOCK_SPEED_MASK: equ 40h ;USB Clock div by 2 mask
0000 USB_CLOCK_SPEED_JUST: equ 0h ;USB Clock div by 2 justified
0000
0000 CLOCK_OUT: equ 0h ;Clock Out value
0003 CLOCK_OUT_MASK: equ 3h ;Clock Out mask
0000 CLOCK_OUT_JUST: equ 0h ;Clock Out value justified
0000
0004 LV_DETECT_LEVEL: equ 4h ;Low V Detect Level value
0007 LV_DETECT_LEVEL_MASK: equ 7h ;Low V Detect Level mask
0004 LV_DETECT_LEVEL_JUST: equ 4h ;Low V Detect Level value justified
0000
0001 PWR_ON_RESET_LEVEL: equ 1h ;PowerOn Reset Level value
0030 PWR_ON_RESET_LEVEL_MASK: equ 30h ;PowerOn Reset Level mask
0010 PWR_ON_RESET_LEVEL_JUST: equ 10h ;PowerOn Reset Level value justified
0000
0000 VREG_ENABLE: equ 0h ;VREG Enable value
0001 VREG_ENABLE_MASK: equ 1h ;VREG Enable mask
0000 VREG_ENABLE_JUST: equ 0h ;VREG Enable value justified
0000
0000 KEEP_ALIVE: equ 0h ;Keep Alive value
0002 KEEP_ALIVE_MASK: equ 2h ;Keep Alive mask
0000 KEEP_ALIVE_JUST: equ 0h ;Keep Alive value justified
0000
0000 WATCHDOG_ENABLE: equ 0h ;Watchdog Enable value
0000
export LoadConfigInit
export _LoadConfigInit
export LoadConfig_cy4623_rdk
export _LoadConfig_cy4623_rdk
export Port_1_Data_SHADE
export _Port_1_Data_SHADE
export NO_SHADOW
export _NO_SHADOW
0010 FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask
00FF END_CONFIG_TABLE: equ ffh ;end of config table indicator
0000
AREA psoc_config(rom, rel)
;---------------------------------------------------------------------------
; LoadConfigInit - Establish the start-up configuration (except for a few
; parameters handled by boot code, like CPU speed). This
; function can be called from user code, but typically it
; is only called from boot.
;
; INPUTS: None.
; RETURNS: Nothing.
; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
; In the large memory model currently only the page
; pointer registers listed below are modified. This does
; not guarantee that in future implementations of this
; function other page pointer registers will not be
; modified.
;
; Page Pointer Registers Modified:
; CUR_PP
;
0000 _LoadConfigInit:
0000 LoadConfigInit:
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
0000 550000 mov [Port_1_Data_SHADE], 0h
0003
0003 7C0000 lcall LoadConfigTBL_cy4623_rdk_Ordered
0006 7C000A lcall LoadConfig_cy4623_rdk
0009
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_2 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_3 )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_11b
ENDIF
ENDIF ; PGMODE LOCKED
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_MASK ; NOTE: transition thru 00b state
or F, FLAG_PGMODE_MASK & FLAG_PGMODE_10b
ENDIF
ENDIF ; PGMODE FREE
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
0009 7F ret
000A
000A ;---------------------------------------------------------------------------
000A ; Load Configuration cy4623_rdk
000A ;
000A ; Load configuration registers for cy4623_rdk.
000A ; IO Bank 0 registers a loaded first,then those in IO Bank 1.
000A ;
000A ; INPUTS: None.
000A ; RETURNS: Nothing.
000A ; SIDE EFFECTS: Registers are volatile: the CPU A and X registers may be
000A ; modified as may the Page Pointer registers!
000A ; In the large memory model currently only the page
000A ; pointer registers listed below are modified. This does
000A ; not guarantee that in future implementations of this
000A ; function other page pointer registers will not be
000A ; modified.
000A ;
000A ; Page Pointer Registers Modified:
000A ; CUR_PP
000A ;
000A _LoadConfig_cy4623_rdk:
000A LoadConfig_cy4623_rdk:
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
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