digtalclk.fit.eqn

用Altera公司的QuartusII编写的电子钟程序

--C1L914 is clock:inst1|h~1244 at LC_X22_Y11_N7
--operation mode is normal

C1L914 = C1L814 & (C1L214 # C1L714) # !C1L814 & C1_h[3] & !C1L214;


--C1L08 is clock:inst1|add~4158 at LC_X21_Y11_N9
--operation mode is normal

C1L08 = C1_h[3] $ (C1_h[2] # C1_h[1]);


--C1L024 is clock:inst1|h~1245 at LC_X22_Y11_N8
--operation mode is normal

C1L024 = C1L914 & (C1L08 # !C1L214) # !C1L914 & !C1L103 & C1L214;


--C1_set is clock:inst1|set at LC_X28_Y13_N1
--operation mode is normal

C1_set_lut_out = C1L341 # C1L241 & C1_set # !C1L241 & (C1L394);
C1_set = DFFEAS(C1_set_lut_out, GLOBAL(J1_modulus_trigger), VCC, , , , , , );


--C1L18 is clock:inst1|add~4159 at LC_X16_Y14_N6
--operation mode is normal

C1L18_carry_eqn = (!C1L061 & C1L99) # (C1L061 & C1L001);
C1L18 = C1L18_carry_eqn $ C1_m[5];


--C1L28 is clock:inst1|add~4164 at LC_X16_Y13_N4
--operation mode is normal

C1L28 = C1L18 & (C1L02);

--C1_m[5] is clock:inst1|m[5] at LC_X16_Y13_N4
--operation mode is normal

C1_m[5] = DFFEAS(C1L28, GLOBAL(C1_clk1m), VCC, , , C1L454, !GLOBAL(C1_set), , );


--C1_clk1m is clock:inst1|clk1m at LC_X45_Y13_N8
--operation mode is normal

C1_clk1m_lut_out = C1L573 & C1_clk1m & (!C1L871 # !C1L471) # !C1L573 & (C1_clk1m # !C1L471 & !C1L871);
C1_clk1m = DFFEAS(C1_clk1m_lut_out, GLOBAL(C1_clk1s), VCC, , , , , , );


--U72L3 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~41 at LC_X18_Y12_N2
--operation mode is arithmetic

U72L3 = U72L8 $ (!EB5L9 & !EB5L01);

--U72L4 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~43 at LC_X18_Y12_N2
--operation mode is arithmetic

U72L4_cout_0 = !U72L8 & (EB5L9 # EB5L01);
U72L4 = CARRY(U72L4_cout_0);

--U72L5 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~43COUT1_70 at LC_X18_Y12_N2
--operation mode is arithmetic

U72L5_cout_1 = !U72L9 & (EB5L9 # EB5L01);
U72L5 = CARRY(U72L5_cout_1);


--T11L3 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~32 at LC_X18_Y14_N8
--operation mode is normal

T11L3 = T11L5;


--U62L3 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~41 at LC_X18_Y13_N9
--operation mode is normal

U62L3 = !U62L8;


--EB5L01 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|StageOut[22]~460 at LC_X18_Y14_N3
--operation mode is normal

EB5L01 = !U62L3 & (C1_m[3] $ T11L3);


--U62L4 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~46 at LC_X18_Y13_N6
--operation mode is arithmetic

U62L4 = U62L11 $ (!EB5L1 & !EB5L2);

--U62L5 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48 at LC_X18_Y13_N6
--operation mode is arithmetic

U62L5_cout_0 = !EB5L1 & !EB5L2 & !U62L11;
U62L5 = CARRY(U62L5_cout_0);

--U62L6 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48COUT1 at LC_X18_Y13_N6
--operation mode is arithmetic

U62L6_cout_1 = !EB5L1 & !EB5L2 & !U62L21;
U62L6 = CARRY(U62L6_cout_1);


--EB5L9 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|StageOut[22]~17 at LC_X18_Y13_N3
--operation mode is normal

EB5L9 = U62L3 & U62L4;


--U72L6 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~46 at LC_X18_Y12_N4
--operation mode is normal

U72L6 = !U72L11;


--EB5L51 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|StageOut[28]~461 at LC_X18_Y12_N7
--operation mode is normal

EB5L51 = U72L6 & (U72L3) # !U72L6 & (EB5L9 # EB5L01);


--EB5L31 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|StageOut[26]~462 at LC_X16_Y12_N4
--operation mode is normal

EB5L31 = C1_m[1] $ U72L6;


--U72L7 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~51 at LC_X18_Y12_N1
--operation mode is arithmetic

U72L7 = U72L41 $ (!EB5L7 & !EB5L8);

--U72L8 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~53 at LC_X18_Y12_N1
--operation mode is arithmetic

U72L8_cout_0 = !EB5L7 & !EB5L8 & !U72L41;
U72L8 = CARRY(U72L8_cout_0);

--U72L9 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~53COUT1 at LC_X18_Y12_N1
--operation mode is arithmetic

U72L9_cout_1 = !EB5L7 & !EB5L8 & !U72L51;
U72L9 = CARRY(U72L9_cout_1);


--EB5L41 is clock:inst1|lpm_divide:mod_rtl_1|lpm_divide_ldf:auto_generated|sign_div_unsign_khg:divider|alt_u_div_dld:divider|StageOut[27]~463 at LC_X18_Y12_N8
--operation mode is normal

EB5L41 = U72L6 & (U72L7) # !U72L6 & (U62L3 $ C1_m[2]);


--C1L38 is clock:inst1|add~4165 at LC_X17_Y12_N9
--operation mode is normal

C1L38 = C1_m[5] $ (C1L301);


--C1L48 is clock:inst1|add~4170 at LC_X17_Y14_N6
--operation mode is normal

C1L48_carry_eqn = (!C1L912 & C1L601) # (C1L912 & C1L701);
C1L48 = C1L48_carry_eqn $ !C1_m[5];


--C1L21 is clock:inst1|LessThan~1397 at LC_X17_Y12_N2
--operation mode is normal

C1L21 = !C1_m[1] & !C1_m[2];


--C1L31 is clock:inst1|LessThan~1398 at LC_X17_Y13_N0
--operation mode is normal

C1L31 = !C1_m[4] & (!C1_m[5]);


--C1L41 is clock:inst1|LessThan~1399 at LC_X17_Y13_N2
--operation mode is normal

C1L41 = C1_m[0] # C1_m[3] # !C1L31 # !C1L21;


--C1L844 is clock:inst1|m~1044 at LC_X15_Y13_N4
--operation mode is normal

C1L844 = C1_num # !C1_pos[0] & C1L41;


--C1L51 is clock:inst1|LessThan~1400 at LC_X17_Y13_N8
--operation mode is normal

C1L51 = C1_m[4] # C1_m[5] # C1_m[3] & !C1L21;


--C1L944 is clock:inst1|m~1045 at LC_X15_Y13_N0
--operation mode is normal

C1L944 = C1_num # C1_pos[0] & C1L51;


--C1L054 is clock:inst1|m~1046 at LC_X15_Y13_N6
--operation mode is normal

C1L054 = C1L844 & (C1L944 & C1L28 # !C1L944 & (C1L48)) # !C1L844 & (!C1L944);


--C1L154 is clock:inst1|m~1047 at LC_X15_Y13_N2
--operation mode is normal

C1L154 = C1L633 & (C1L054 & (!C1L203) # !C1L054 & C1L38) # !C1L633 & (C1L054);


--C1L254 is clock:inst1|m~1048 at LC_X16_Y13_N3
--operation mode is normal

C1L254 = C1_pos[1] & (C1_m[5]) # !C1_pos[1] & !C1L733 & (C1L154);


--C1L58 is clock:inst1|add~4175 at LC_X16_Y13_N9
--operation mode is normal

C1L58 = C1_m[5] $ !C1L901;


--C1L61 is clock:inst1|LessThan~1401 at LC_X17_Y13_N9
--operation mode is normal

C1L61 = C1_m[4] & (C1_m[5]);


--C1L354 is clock:inst1|m~1049 at LC_X17_Y13_N4
--operation mode is normal

C1L354 = C1L733 & (C1L21 & !C1_m[3] # !C1L61);


--C1L454 is clock:inst1|m~1050 at LC_X16_Y13_N2
--operation mode is normal

C1L454 = C1L254 # !C1_pos[1] & C1L58 & C1L354;


--C1L68 is clock:inst1|add~4180 at LC_X25_Y10_N8
--operation mode is arithmetic

C1L68 = C1_alm_m[4] $ C1L202;

--C1L78 is clock:inst1|add~4182 at LC_X25_Y10_N8
--operation mode is arithmetic

C1L78_cout_0 = !C1L202 # !C1_alm_m[4];
C1L78 = CARRY(C1L78_cout_0);

--C1L88 is clock:inst1|add~4182COUT1_4583 at LC_X25_Y10_N8
--operation mode is arithmetic

C1L88_cout_1 = !C1L302 # !C1_alm_m[4];
C1L88 = CARRY(C1L88_cout_1);


--C1L98 is clock:inst1|add~4185 at LC_X24_Y10_N3
--operation mode is arithmetic

C1L98 = C1_alm_m[4] $ (!C1L502);

--C1L09 is clock:inst1|add~4187 at LC_X24_Y10_N3
--operation mode is arithmetic

C1L09_cout_0 = !C1_alm_m[4] & (!C1L502);
C1L09 = CARRY(C1L09_cout_0);

--C1L19 is clock:inst1|add~4187COUT1_4580 at LC_X24_Y10_N3
--operation mode is arithmetic

C1L19_cout_1 = !C1_alm_m[4] & (!C1L602);
C1L19 = CARRY(C1L19_cout_1);


--C1L29 is clock:inst1|add~4190 at LC_X26_Y11_N5
--operation mode is arithmetic

C1L29_carry_eqn = (!C1L802 & GND) # (C1L802 & VCC);
C1L29 = C1_alm_m[4] $ (C1L29_carry_eqn);

--C1L39 is clock:inst1|add~4192 at LC_X26_Y11_N5
--operation mode is arithmetic

C1L39_cout_0 = C1_alm_m[4] # !C1L802;
C1L39 = CARRY(C1L39_cout_0);

--C1L49 is clock:inst1|add~4192COUT1_4558 at LC_X26_Y11_N5
--operation mode is arithmetic

C1L49_cout_1 = C1_alm_m[4] # !C1L802;
C1L49 = CARRY(C1L49_cout_1);


--C1L59 is clock:inst1|add~4195 at LC_X25_Y12_N5
--operation mode is arithmetic

C1L59_carry_eqn = (!C1L212 & GND) # (C1L212 & VCC);
C1L59 = C1_alm_m[4] $ (!C1L59_carry_eqn);

--C1L69 is clock:inst1|add~4197 at LC_X25_Y12_N5
--operation mode is arithmetic

C1L69_cout_0 = C1_alm_m[4] & (!C1L212);
C1L69 = CARRY(C1L69_cout_0);

--C1L79 is clock:inst1|add~4197COUT1_4555 at LC_X25_Y12_N5
--operation mode is arithmetic

C1L79_cout_1 = C1_alm_m[4] & (!C1L212);
C1L79 = CARRY(C1L79_cout_1);


--C1L253 is clock:inst1|alm_m~1258 at LC_X25_Y11_N7
--operation mode is normal

C1L253 = C1L643 & (C1L743 & C1L59 # !C1L743 & (C1L29)) # !C1L643 & (!C1L743);


--C1L353 is clock:inst1|alm_m~1259 at LC_X25_Y11_N5
--operation mode is normal

C1L353 = C1L633 & (C1L253 & (!C1L003) # !C1L253 & C1L98) # !C1L633 & (C1L253);


--C1L89 is clock:inst1|add~4200 at LC_X16_Y14_N5
--operation mode is arithmetic

C1L89_carry_eqn = (!C1L061 & GND) # (C1L061 & VCC);
C1L89 = C1_m[4] $ (!C1L89_carry_eqn);

--C1L99 is clock:inst1|add~4202 at LC_X16_Y14_N5
--operation mode is arithmetic

C1L99_cout_0 = C1_m[4] & (!C1L061);
C1L99 = CARRY(C1L99_cout_0);

--C1L001 is clock:inst1|add~4202COUT1_4561 at LC_X16_Y14_N5
--operation mode is arithmetic

C1L001_cout_1 = C1_m[4] & (!C1L061);
C1L001 = CARRY(C1L001_cout_1);


--C1L101 is clock:inst1|add~4205 at LC_X16_Y14_N9
--operation mode is normal

C1L101 = C1L89 & (C1L02);

--C1_m[4] is clock:inst1|m[4] at LC_X16_Y14_N9
--operation mode is normal

C1_m[4] = DFFEAS(C1L101, GLOBAL(C1_clk1m), VCC, , , C1L854, !GLOBAL(C1_set), , );


--C1L201 is clock:inst1|add~4206 at LC_X17_Y12_N8
--operation mode is arithmetic

C1L201 = C1_m[4] $ (!C1L612);

--C1L301 is clock:inst1|add~4208 at LC_X17_Y12_N8
--operation mode is arithmetic

C1L301_cout_0 = !C1_m[4] & (!C1L612);
C1L301 = CARRY(C1L301_cout_0);

--C1L401 is clock:inst1|add~4208COUT1_4573 at LC_X17_Y12_N8
--operation mode is arithmetic

C1L401_cout_1 = !C1_m[4] & (!C1L712);
C1L401 = CARRY(C1L401_cout_1);


--C1L501 is clock:inst1|add~4211 at LC_X17_Y14_N5
--operation mode is arithmetic

C1L501_carry_eqn = (!C1L912 & GND) # (C1L912 & VCC);
C1L501 = C1_m[4] $ (C1L501_carry_eqn);

--C1L601 is clock:inst1|add~4213 at LC_X17_Y14_N5
--operation mode is arithmetic

C1L601_cout_0 = C1_m[4] # !C1L912;
C1L601 = CARRY(C1L601_cout_0);

--C1L701 is clock:inst1|add~4213COUT1_4564 at LC_X17_Y14_N5
--operation mode is arithmetic

C1L701_cout_1 = C1_m[4] # !C1L912;
C1L701 = CARRY(C1L701_cout_1);


--C1L554 is clock:inst1|m~1051 at LC_X15_Y13_N5
--operation mode is normal

C1L554 = C1L944 & (C1L101 & C1L844) # !C1L944 & (C1L501 # !C1L844);


--C1L654 is clock:inst1|m~1052 at LC_X15_Y13_N3
--operation mode is normal

C1L654 = C1L554 & (!C1L633 # !C1L203) # !C1L554 & (C1L201 & C1L633);