digtalclk.fit.eqn

用Altera公司的QuartusII编写的电子钟程序

U82L3 = U82L8 $ (!LB3L3 & !LB3L4);

--U82L4 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~45 at LC_X29_Y11_N7
--operation mode is arithmetic

U82L4_cout_0 = !U82L8 & (LB3L3 # LB3L4);
U82L4 = CARRY(U82L4_cout_0);

--U82L5 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~45COUT1_73 at LC_X29_Y11_N7
--operation mode is arithmetic

U82L5_cout_1 = !U82L9 & (LB3L3 # LB3L4);
U82L5 = CARRY(U82L5_cout_1);


--T21L3 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~32 at LC_X29_Y10_N8
--operation mode is normal

T21L3 = T21L8;


--T21L4 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~37 at LC_X29_Y10_N6
--operation mode is arithmetic

T21L4 = C1_alm_h[3] $ !T21L11;

--T21L5 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~39 at LC_X29_Y10_N6
--operation mode is arithmetic

T21L5_cout_0 = !C1_alm_h[3] & !T21L11;
T21L5 = CARRY(T21L5_cout_0);

--T21L6 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~39COUT1 at LC_X29_Y10_N6
--operation mode is arithmetic

T21L6_cout_1 = !C1_alm_h[3] & !T21L21;
T21L6 = CARRY(T21L6_cout_1);


--LB3L4 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[17]~17 at LC_X29_Y10_N3
--operation mode is normal

LB3L4 = T21L3 & T21L4;


--LB3L3 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[17]~12 at LC_X29_Y10_N9
--operation mode is normal

LB3L3 = C1_alm_h[3] & !T21L3;


--U82L6 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48 at LC_X29_Y11_N9
--operation mode is normal

U82L6 = !U82L11;


--LB3L9 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[23]~310 at LC_X29_Y11_N3
--operation mode is normal

LB3L9 = U82L6 & U82L3 # !U82L6 & (LB3L3 # LB3L4);


--U82L7 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~53 at LC_X29_Y11_N6
--operation mode is arithmetic

U82L7 = U82L41 $ (!LB3L2 & !LB3L1);

--U82L8 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~55 at LC_X29_Y11_N6
--operation mode is arithmetic

U82L8_cout_0 = !LB3L2 & !LB3L1 & !U82L41;
U82L8 = CARRY(U82L8_cout_0);

--U82L9 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~55COUT1 at LC_X29_Y11_N6
--operation mode is arithmetic

U82L9_cout_1 = !LB3L2 & !LB3L1 & !U82L51;
U82L9 = CARRY(U82L9_cout_1);


--LB3L8 is clock:inst1|lpm_divide:mod_rtl_2|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[22]~311 at LC_X29_Y11_N0
--operation mode is normal

LB3L8 = U82L6 & U82L7 # !U82L6 & (C1_alm_h[2] $ T21L3);


--C1L26 is clock:inst1|add~4132 at LC_X29_Y11_N4
--operation mode is normal

C1L26 = LB3L8 & (U82L6 $ C1_alm_h[1]);


--C1L36 is clock:inst1|add~4133 at LC_X26_Y12_N3
--operation mode is normal

C1L36 = C1_alm_h[3] $ (C1_alm_h[2] # C1_alm_h[1]);


--C1L9 is clock:inst1|LessThan~1392 at LC_X26_Y12_N6
--operation mode is normal

C1L9 = !C1_alm_h[4] & (!C1_alm_h[1] & !C1_alm_h[2] # !C1_alm_h[3]);


--C1L613 is clock:inst1|alm_h~1813 at LC_X26_Y12_N5
--operation mode is normal

C1L613 = C1L9 & (LB3L9 $ !C1L26) # !C1L9 & C1L36;


--C1L46 is clock:inst1|add~4134 at LC_X29_Y10_N4
--operation mode is normal

C1L46 = C1_alm_h[3] $ (C1_alm_h[1] & C1_alm_h[2]);


--C1L56 is clock:inst1|add~4135 at LC_X28_Y12_N8
--operation mode is arithmetic

C1L56 = C1_alm_h[3] $ !C1L741;

--C1L66 is clock:inst1|add~4137 at LC_X28_Y12_N8
--operation mode is arithmetic

C1L66_cout_0 = !C1_alm_h[3] & !C1L741;
C1L66 = CARRY(C1L66_cout_0);

--C1L76 is clock:inst1|add~4137COUT1_4546 at LC_X28_Y12_N8
--operation mode is arithmetic

C1L76_cout_1 = !C1_alm_h[3] & !C1L841;
C1L76 = CARRY(C1L76_cout_1);


--C1L86 is clock:inst1|add~4140 at LC_X28_Y10_N8
--operation mode is arithmetic

C1L86 = C1_alm_h[3] $ (C1L051);

--C1L96 is clock:inst1|add~4142 at LC_X28_Y10_N8
--operation mode is arithmetic

C1L96_cout_0 = !C1L051 # !C1_alm_h[3];
C1L96 = CARRY(C1L96_cout_0);

--C1L07 is clock:inst1|add~4142COUT1_4543 at LC_X28_Y10_N8
--operation mode is arithmetic

C1L07_cout_1 = !C1L151 # !C1_alm_h[3];
C1L07 = CARRY(C1L07_cout_1);


--C1L013 is clock:inst1|alm_h[3]~1814 at LC_X28_Y11_N1
--operation mode is normal

C1L013 = C1_alm_h[1] # C1_alm_h[2] # C1_alm_h[0] # C1_alm_h[3];


--C1L113 is clock:inst1|alm_h[3]~1815 at LC_X28_Y11_N2
--operation mode is normal

C1L113 = C1_num & (!C1_pos[0]) # !C1_num & (C1_alm_h[4] # C1L013);


--C1L213 is clock:inst1|alm_h[3]~1816 at LC_X28_Y11_N6
--operation mode is normal

C1L213 = C1_num & (C1L9 # !C1_pos[0]);


--C1L713 is clock:inst1|alm_h~1817 at LC_X28_Y11_N8
--operation mode is normal

C1L713 = C1L213 & (C1L86 # !C1L113) # !C1L213 & C1L56 & C1L113;


--C1L813 is clock:inst1|alm_h~1818 at LC_X28_Y11_N9
--operation mode is normal

C1L813 = C1L733 & (C1L713 & (!C1L46) # !C1L713 & LB3L9) # !C1L733 & C1L713;


--C1L01 is clock:inst1|LessThan~1393 at LC_X28_Y11_N7
--operation mode is normal

C1L01 = !C1_alm_h[3] & (!C1_alm_h[0] # !C1_alm_h[2] # !C1_alm_h[1]);


--C1L313 is clock:inst1|alm_h[3]~1819 at LC_X28_Y11_N3
--operation mode is normal

C1L313 = C1L01 # C1L733 # !C1_alm_h[4] # !C1L213;


--C1L513 is clock:inst1|alm_h[4]~1821 at LC_X28_Y12_N2
--operation mode is normal

C1_lastas_qfbk = C1_lastas;
C1L513 = C1_pos[1] & (C1_lastas_qfbk & !C1_alm_set);

--C1_lastas is clock:inst1|lastas at LC_X28_Y12_N2
--operation mode is normal

C1_lastas = DFFEAS(C1L513, GLOBAL(J1_modulus_trigger), VCC, , , C1_alm_set, , , VCC);


--C1L17 is clock:inst1|add~4145 at LC_X23_Y11_N3
--operation mode is arithmetic

C1L17 = C1_h[3] $ C1L351;

--C1L27 is clock:inst1|add~4147 at LC_X23_Y11_N3
--operation mode is arithmetic

C1L27_cout_0 = !C1L351 # !C1_h[3];
C1L27 = CARRY(C1L27_cout_0);

--C1L37 is clock:inst1|add~4147COUT1_4549 at LC_X23_Y11_N3
--operation mode is arithmetic

C1L37_cout_1 = !C1L451 # !C1_h[3];
C1L37 = CARRY(C1L37_cout_1);


--C1L47 is clock:inst1|add~4150 at LC_X23_Y11_N5
--operation mode is normal

C1L47 = C1L17 & (C1L81);

--C1_h[3] is clock:inst1|h[3] at LC_X23_Y11_N5
--operation mode is normal

C1_h[3] = DFFEAS(C1L47, GLOBAL(C1_clk1h), VCC, , , C1L024, !GLOBAL(C1_set), , );


--C1_clk1h is clock:inst1|clk1h at LC_X15_Y13_N9
--operation mode is normal

C1_clk1h_lut_out = C1L273 & C1_clk1h & (!C1L851 # !C1L361) # !C1L273 & (C1_clk1h # !C1L361 & !C1L851);
C1_clk1h = DFFEAS(C1_clk1h_lut_out, GLOBAL(C1_clk1m), VCC, , C1_set, , , , );


--U92L3 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~41 at LC_X22_Y13_N7
--operation mode is arithmetic

U92L3 = U92L8 $ (!LB4L4 & !LB4L3);

--U92L4 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~43 at LC_X22_Y13_N7
--operation mode is arithmetic

U92L4_cout_0 = !U92L8 & (LB4L4 # LB4L3);
U92L4 = CARRY(U92L4_cout_0);

--U92L5 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~43COUT1_70 at LC_X22_Y13_N7
--operation mode is arithmetic

U92L5_cout_1 = !U92L9 & (LB4L4 # LB4L3);
U92L5 = CARRY(U92L5_cout_1);


--T31L3 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~32 at LC_X21_Y12_N3
--operation mode is normal

T31L3 = T31L8;


--T31L4 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~37 at LC_X21_Y12_N1
--operation mode is arithmetic

T31L4 = C1_h[3] $ (!T31L11);

--T31L5 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~39 at LC_X21_Y12_N1
--operation mode is arithmetic

T31L5_cout_0 = !C1_h[3] & (!T31L11);
T31L5 = CARRY(T31L5_cout_0);

--T31L6 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_ne8:add_sub_3|add_sub_cella[2]~39COUT1 at LC_X21_Y12_N1
--operation mode is arithmetic

T31L6_cout_1 = !C1_h[3] & (!T31L21);
T31L6 = CARRY(T31L6_cout_1);


--LB4L4 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[17]~17 at LC_X21_Y12_N9
--operation mode is normal

LB4L4 = T31L4 & (T31L3);


--LB4L3 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[17]~12 at LC_X23_Y12_N0
--operation mode is normal

LB4L3 = C1_h[3] & (!T31L3);


--U92L6 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~46 at LC_X22_Y13_N9
--operation mode is normal

U92L6 = !U92L11;


--LB4L9 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[23]~299 at LC_X22_Y13_N0
--operation mode is normal

LB4L9 = U92L6 & (U92L3) # !U92L6 & (LB4L3 # LB4L4);


--U92L7 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~51 at LC_X22_Y13_N6
--operation mode is arithmetic

U92L7 = U92L41 $ (!LB4L1 & !LB4L2);

--U92L8 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~53 at LC_X22_Y13_N6
--operation mode is arithmetic

U92L8_cout_0 = !LB4L1 & !LB4L2 & !U92L41;
U92L8 = CARRY(U92L8_cout_0);

--U92L9 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~53COUT1 at LC_X22_Y13_N6
--operation mode is arithmetic

U92L9_cout_1 = !LB4L1 & !LB4L2 & !U92L51;
U92L9 = CARRY(U92L9_cout_1);


--LB4L8 is clock:inst1|lpm_divide:mod_rtl_3|lpm_divide_kdf:auto_generated|sign_div_unsign_jhg:divider|alt_u_div_bld:divider|StageOut[22]~300 at LC_X22_Y13_N1
--operation mode is normal

LB4L8 = U92L6 & (U92L7) # !U92L6 & (T31L3 $ C1_h[2]);


--C1L57 is clock:inst1|add~4151 at LC_X22_Y12_N3
--operation mode is normal

C1L57 = LB4L8 & (C1_h[1] $ (U92L6));


--C1L214 is clock:inst1|h~1237 at LC_X25_Y13_N3
--operation mode is normal

C1L214 = C1_pos[0] & C1_pos[1] & !C1_num;


--C1L67 is clock:inst1|add~4152 at LC_X22_Y10_N2
--operation mode is normal

C1L67 = C1_h[3] $ (C1_h[1] & C1_h[2]);


--C1L77 is clock:inst1|add~4153 at LC_X22_Y11_N3
--operation mode is arithmetic

C1L77 = C1_h[3] $ !C1L961;

--C1L87 is clock:inst1|add~4155 at LC_X22_Y11_N3
--operation mode is arithmetic

C1L87_cout_0 = !C1_h[3] & !C1L961;
C1L87 = CARRY(C1L87_cout_0);

--C1L97 is clock:inst1|add~4155COUT1_4552 at LC_X22_Y11_N3
--operation mode is arithmetic

C1L97_cout_1 = !C1_h[3] & !C1L071;
C1L97 = CARRY(C1L97_cout_1);


--C1L314 is clock:inst1|h~1238 at LC_X23_Y12_N6
--operation mode is normal

C1L314 = C1_h[1] # C1_h[4] # C1_h[3] # C1_h[0];


--C1L414 is clock:inst1|h~1239 at LC_X23_Y12_N8
--operation mode is normal

C1L414 = C1_num & (!C1_pos[0]) # !C1_num & (C1_h[2] # C1L314);


--C1L11 is clock:inst1|LessThan~1395 at LC_X24_Y11_N3
--operation mode is normal

C1L11 = C1_h[3] & (C1_h[1] # C1_h[2]);


--C1L514 is clock:inst1|h~1240 at LC_X24_Y11_N8
--operation mode is normal

C1L514 = C1_num & (!C1_h[4] & !C1L11 # !C1_pos[0]);


--C1L614 is clock:inst1|h~1241 at LC_X22_Y11_N5
--operation mode is normal

C1L614 = C1L414 & (C1L514 & C1L47 # !C1L514 & (C1L77)) # !C1L414 & (C1L514);


--C1L714 is clock:inst1|h~1242 at LC_X22_Y11_N6
--operation mode is normal

C1L714 = C1L733 & (C1L614 & (!C1L67) # !C1L614 & LB4L9) # !C1L733 & (C1L614);


--C1L814 is clock:inst1|h~1243 at LC_X24_Y11_N4
--operation mode is normal

C1L814 = C1_pos[1] & (C1_h[4] # C1L11 # !C1L633);