digtalclk.fit.qmsg

用Altera公司的QuartusII编写的电子钟程序

{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" {  } {  } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" {  } {  } 0}
{ "Info" "IFYGR_FYGR_GLOBAL_LINES_NEEDED_FOR_TORNADO_DQS" "0 " "Info: DQS I/O pins require 0 global routing resources." {  } {  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk50mhz Global clock in PIN 29 " "Info: Automatically promoted signal \"clk50mhz\" to use Global clock in PIN 29" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 64 -96 72 80 "clk50mhz" "" } } } }  } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|modulus_trigger Global clock " "Info: Automatically promoted some destinations of signal \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|modulus_trigger\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella15 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella15\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella16 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella16\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella17 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella17\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella14 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella14\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella0 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella0\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella1 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella1\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella2 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella2\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella3 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella3\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella4 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella4\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella5 " "Info: Destination \"lpm_counter0:inst\|lpm_counter:lpm_counter_component\|cntr_gu8:auto_generated\|counter_cella5\" may be non-global or may not use global clock" {  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 205 8 0 } }  } 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_LIMITED_TO_SUB" "10 " "Info: Limited to 10 non-global destinations" {  } {  } 0}  } { { "db/cntr_gu8.tdf" "" { Text "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/cntr_gu8.tdf" 203 2 0 } }  } 0}