digtalclk.fit.qmsg

用Altera公司的QuartusII编写的电子钟程序

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Oct 29 21:15:38 2007 " "Info: Processing started: Mon Oct 29 21:15:38 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off digtalclk -c digtalclk " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off digtalclk -c digtalclk" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "digtalclk EP1C12Q240C8 " "Info: Selected device EP1C12Q240C8 for design \"digtalclk\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1C6Q240C8 " "Info: Device EP1C6Q240C8 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "17 17 " "Info: No exact pin location assignment(s) for 17 pins of 17 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "beep " "Info: Pin beep not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 128 672 848 144 "beep" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "beep" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { beep } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { beep } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ledcom\[3\] " "Info: Pin ledcom\[3\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 216 776 952 232 "ledcom\[0\]" "" } { 232 776 952 248 "ledcom\[1\]" "" } { 248 776 952 264 "ledcom\[2\]" "" } { 264 776 952 280 "ledcom\[3\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ledcom\[3\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ledcom[3] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ledcom[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ledcom\[2\] " "Info: Pin ledcom\[2\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 216 776 952 232 "ledcom\[0\]" "" } { 232 776 952 248 "ledcom\[1\]" "" } { 248 776 952 264 "ledcom\[2\]" "" } { 264 776 952 280 "ledcom\[3\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ledcom\[2\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ledcom[2] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ledcom[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ledcom\[1\] " "Info: Pin ledcom\[1\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 216 776 952 232 "ledcom\[0\]" "" } { 232 776 952 248 "ledcom\[1\]" "" } { 248 776 952 264 "ledcom\[2\]" "" } { 264 776 952 280 "ledcom\[3\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ledcom\[1\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ledcom[1] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ledcom[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ledcom\[0\] " "Info: Pin ledcom\[0\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 216 776 952 232 "ledcom\[0\]" "" } { 232 776 952 248 "ledcom\[1\]" "" } { 248 776 952 264 "ledcom\[2\]" "" } { 264 776 952 280 "ledcom\[3\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ledcom\[0\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ledcom[0] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ledcom[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[6\] " "Info: Pin seg7\[6\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[6\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[6] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[6] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[5\] " "Info: Pin seg7\[5\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[5\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[5] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[5] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[4\] " "Info: Pin seg7\[4\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[4\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[4] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[4] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[3\] " "Info: Pin seg7\[3\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[3\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[3] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[3] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[2\] " "Info: Pin seg7\[2\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[2\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[2] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[2] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[1\] " "Info: Pin seg7\[1\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[1\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[1] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[1] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "seg7\[0\] " "Info: Pin seg7\[0\] not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 384 824 1000 400 "seg7\[6..0\]" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "seg7\[0\]" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { seg7[0] } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { seg7[0] } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk50mhz " "Info: Pin clk50mhz not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 64 -96 72 80 "clk50mhz" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk50mhz" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { clk50mhz } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { clk50mhz } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ink1 " "Info: Pin ink1 not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 168 -112 56 184 "ink1" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ink1" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ink1 } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ink1 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ink4 " "Info: Pin ink4 not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 456 -112 56 472 "ink4" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ink4" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ink4 } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ink4 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ink3 " "Info: Pin ink3 not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 360 -112 56 376 "ink3" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ink3" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ink3 } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ink3 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "ink2 " "Info: Pin ink2 not assigned to an exact location on the device" {  } { { "digtalclk.bdf" "" { Schematic "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.bdf" { { 264 -112 56 280 "ink2" "" } } } } { "e:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "e:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "ink2" } } } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" "" { Report "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk_cmp.qrpt" Compiler "digtalclk" "UNKNOWN" "V1" "D:/Study/大4/近代电子学试验QuartusII/digtalclk/db/digtalclk.quartus_db" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/" "" "" { ink2 } "NODE_NAME" } "" } } { "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" { Floorplan "D:/Study/大4/近代电子学试验QuartusII/digtalclk/digtalclk.fld" "" "" { ink2 } "NODE_NAME" } }  } 0}  } {  } 0}