📄 testheader.h
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#ifndef TESTHEADER_H
#define TESTHEADER_H
typedef unsigned char BYTE;
typedef unsigned short WORD;
typedef unsigned long DWORD;
typedef bit BOOL;
#define TRUE 1
#define FALSE 0
#define bmBIT0 0x01
#define bmBIT1 0x02
#define bmBIT2 0x04
#define bmBIT3 0x08
#define bmBIT4 0x10
#define bmBIT5 0x20
#define bmBIT6 0x40
#define bmBIT7 0x80
#define DEVICE_DSCR 0x01
#define CONFIG_DSCR 0x02
#define STRING_DSCR 0x03
#define INTRFC_DSCR 0x04
#define ENDPNT_DSCR 0x05
#define DEVQUAL_DSCR 0x06
#define OTHERSPEED_DSCR 0x07
#define bmBUSPWR bmBIT7
#define bmSELFPWR bmBIT6
#define bmRWU bmBIT5
#define bmEPOUT bmBIT7
#define bmEPIN 0x00
#define EP_CONTROL 0x00
#define EP_ISO 0x01
#define EP_BULK 0x02
#define EP_INT 0x03
#define SUD_SIZE 8
#define SETUP_MASK 0x60
#define SETUP_STANDARD_REQUEST 0
#define SETUP_CLASS_REQUEST 0x20
#define SETUP_VENDOR_REQUEST 0x40
#define SETUP_RESERVED_REQUEST 0x60
#define SC_GET_STATUS 0x00
#define SC_CLEAR_FEATURE 0x01
#define SC_RESERVED 0x02
#define SC_SET_FEATURE 0x03
#define SC_SET_ADDRESS 0x05
#define SC_GET_DESCRIPTOR 0x06
#define SC_SET_DESCRIPTOR 0x07
#define SC_GET_CONFIGURATION 0x08
#define SC_SET_CONFIGURATION 0x09
#define SC_GET_INTERFACE 0x0a
#define SC_SET_INTERFACE 0x0b
#define SC_SYNC_FRAME 0x0c
#define SC_ANCHOR_LOAD 0xa0
#define GD_DEVICE 0x01
#define GD_CONFIGURATION 0x02
#define GD_STRING 0x03
#define GD_INTERFACE 0x04
#define GD_ENDPOINT 0x05
#define GD_DEVICE_QUALIFIER 0x06
#define GD_OTHER_SPEED_CONFIGURATION 0x07
#define GD_INTERFACE_POWER 0x08
#define GD_HID 0x21
#define GD_REPORT 0x22
#define GS_DEVICE 0x80
#define GS_INTERFACE 0x81
#define GS_ENDPOINT 0x82
#define FT_DEVICE 0x00
#define FT_ENDPOINT 0x02
#define I2C_IDLE 0
#define I2C_SENDING 1
#define I2C_RECEIVING 2
#define I2C_PRIME 3
#define I2C_STOP 5
#define I2C_BERROR 6
#define I2C_NACK 7
#define I2C_OK 8
#define I2C_WAITSTOP 9
typedef struct
{
BYTE length;
BYTE type;
}DSCR;
typedef struct
{
BYTE length;
BYTE type;
BYTE spec_ver_minor;
BYTE spec_ver_major;
BYTE dev_class;
BYTE sub_class;
BYTE protocol;
BYTE max_packet;
WORD vendor_id;
WORD product_id;
WORD version_id;
BYTE mfg_str;
BYTE prod_str;
BYTE serialnum_str;
BYTE configs;
}DEVICEDSCR;
typedef struct
{
BYTE length;
BYTE type;
BYTE spec_ver_minor;
BYTE spec_ver_major;
BYTE dev_class;
BYTE sub_class;
BYTE protocol;
BYTE max_packet;
BYTE configs;
BYTE reserved0;
}DEVICEQUALDSCR;
typedef struct
{
BYTE length;
BYTE type;
WORD config_len;
BYTE interfaces;
BYTE index;
BYTE config_str;
BYTE attrib;
BYTE power;
}CONFIGDSCR;
typedef struct
{
BYTE length;
BYTE type;
BYTE index;
BYTE alt_setting;
BYTE ep_cnt;
BYTE class;
BYTE sub_class;
BYTE protocol;
BYTE interface_str;
}INTRFCDSCR;
typedef struct
{
BYTE length;
BYTE type;
BYTE addr;
BYTE ep_type;
BYTE mp_L;
BYTE mp_H;
BYTE interval;
}ENDPNTDSCR;
typedef struct
{
BYTE length;
BYTE type;
}STRINGDSCR;
typedef struct
{
BYTE cntrl;
BYTE bytes;
}EPIOC;
typedef struct
{
BYTE length;
BYTE *dat;
BYTE count;
BYTE status;
}I2CPCKT;
#define INT0_VECT 0
#define TMR0_VECT 1
#define INT1_VECT 2
#define TMR1_VECT 3
#define COM0_VECT 4
#define TMR2_VECT 5
#define WKUP_VECT 6
#define COM1_VECT 7
#define USB_VECT 8
#define I2C_VECT 9
#define INT4_VECT 10
#define INT5_VECT 11
#define INT6_VECT 12
#define SUDAV_USBVECT (0 << 2)
#define SOF_USBVECT (1 << 2)
#define SUTOK_USBVECT (2 << 2)
#define SUSP_USBVECT (3 << 2)
#define URES_USBVECT (4 << 2)
#define HS_USBVECT (5 << 2)
#define EP0ACK_USBVECT (6 << 2)
#define SPARE0_USBVECT (7 << 2)
#define IN0BUF_USBVECT (8 << 2)
#define OUT0BUF_USBVECT (9 << 2)
#define IN1BUF_USBVECT (10 << 2)
#define OUT1BUF_USBVECT (11 << 2)
#define INOUT2BUF_USBVECT (12 << 2)
#define INOUT4BUF_USBVECT (13 << 2)
#define INOUT6BUF_USBVECT (14 << 2)
#define INOUT8BUF_USBVECT (15 << 2)
#define IBN_USBVECT (16 << 2)
#define SPARE1_USBVECT (17 << 2)
#define EP0PINGNAK_USBVECT (18 << 2)
#define EP1PINGNAK_USBVECT (19 << 2)
#define EP2PINGNAK_USBVECT (20 << 2)
#define EP4PINGNAK_USBVECT (21 << 2)
#define EP6PINGNAK_USBVECT (22 << 2)
#define EP8PINGNAK_USBVECT (23 << 2)
#define ERRLIM_USBVECT (24 << 2)
#define SPARE2_USBVECT (25 << 2)
#define SPARE3_USBVECT (26 << 2)
#define SPARE4_USBVECT (27 << 2)
#define EP2PIDERR_USBVECT (28 << 2)
#define EP4PIDERR_USBVECT (29 << 2)
#define EP6PIDERR_USBVECT (30 << 2)
#define EP8PIDERR_USBVECT (31 << 2)
#define INTERNAL_DSCR_ADDR 0x0080
#define bmSTRETCH 0x07
#define FW_STRETCH_VALUE 0x0
#define MSB(word) (BYTE)(((WORD)(word) >> 8) & 0xff)
#define LSB(word) (BYTE)((WORD)(word) & 0xff)
#define SWAP_ENDIAN(word) ((BYTE*)&word)[0] ^= ((BYTE*)&word)[1];\
((BYTE*)&word)[1] ^= ((BYTE*)&word)[0];\
((BYTE*)&word)[0] ^= ((BYTE*)&word)[1]
#define EZUSB_IRQ_ENABLE() EUSB = 1
#define EZUSB_IRQ_DISABLE() EUSB = 0
#define EZUSB_IRQ_CLEAR() EXIF &= ~0x10
#define EZUSB_STALL_EP0() EP0CS |= bmEPSTALL
#define EZUSB_RESET_DATA_TOGGLE(ep) TOGCTL = (((ep & 0x80) >> 3) + (ep & 0x0F));\
TOGCTL |= bmRESETTOGGLE
#define EZUSB_ENABLE_RSMIRQ() (EICON |= 0x20)
#define EZUSB_DISABLE_RSMIRQ() (EICON &= ~0x20)
#define EZUSB_CLEAR_RSMIRQ() (EICON &= ~0x10)
#define EZUSB_GETI2CSTATUS() (I2CPckt.status)
#define EZUSB_CLEARI2CSTATUS() if((I2CPckt.status == I2C_BERROR) || (I2CPckt.status == I2C_NACK))\
I2CPckt.status = I2C_IDLE;
#define EZUSB_EXTWAKEUP() (((WAKEUPCS & bmWU2) && (WAKEUPCS & bmWU2EN)) ||\
((WAKEUPCS & bmWU) && (WAKEUPCS & bmWUEN)))
#define EZUSB_HIGHSPEED() (USBCS & bmHSM)
extern code BYTE USB_AutoVector;
extern WORD pDeviceDscr;
extern WORD pDeviceQualDscr;
extern WORD pHighSpeedConfigDscr;
extern WORD pFullSpeedConfigDscr;
extern WORD pConfigDscr;
extern WORD pOtherConfigDscr;
extern WORD pStringDscr;
extern code DEVICEDSCR DeviceDscr;
extern code DEVICEQUALDSCR DeviceQualDscr;
extern code CONFIGDSCR HighSpeedConfigDscr;
extern code CONFIGDSCR FullSpeedConfigDscr;
extern code STRINGDSCR StringDscr;
extern code DSCR UserDscr;
#endif
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