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📄 spi.lst

📁 AT25320-AT251024的SPI控制程序
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   33:     IENABLE;                /* handles nested interrupt */
 00000010  E14FE000  MRS         R14,SPSR
 00000014  E92D4000  STMFD       R13!,{LR}
 00000018  E321F01F  MSR         CPSR_c,#0x1F
 0000001C  E92D4000  STMFD       R13!,{LR}
   35:     regValue = S0SPSR;
 00000020  E5100000  LDR         R0,=0xE0020004
 00000024  E5901000  LDR         R1,[R0,#0x0]
 00000028  ---- Variable 'regValue' assigned to Register 'R1' ----
   36:     if ( regValue & WCOL )
 00000028  E1A00001  MOV         R0,R1 ; regValue
 0000002C  E3100040  TST         R0,#0x0040 ; regValue
 00000030  0A000004  BEQ         L_1  ; Targ=0x48
   38:     SPI0Status |= SPI0_COL;
 00000034  E5100000  LDR         R0,=SPI0Status ; SPI0Status
 00000038  E5902000  LDR         R2,[R0,#0x0] ; SPI0Status
 0000003C  E3822008  ORR         R2,R2,#0x0008
 00000040  E5100000  LDR         R0,=SPI0Status ; SPI0Status
 00000044  E5802000  STR         R2,[R0,#0x0] ; SPI0Status
   39:     }
 00000048          L_1:
   40:     if ( regValue & SPIF )
 00000048  E1A00001  MOV         R0,R1 ; regValue
 0000004C  E3100080  TST         R0,#0x0080 ; regValue
 00000050  0A000008  BEQ         L_2  ; Targ=0x78
   42:     SPI0Status |= SPI0_TX_DONE;
 00000054  E5100000  LDR         R0,=SPI0Status ; SPI0Status
 00000058  E5901000  LDR         R1,[R0,#0x0] ; SPI0Status
 0000005C  E3811010  ORR         R1,R1,#0x0010
 00000060  E5100000  LDR         R0,=SPI0Status ; SPI0Status
 00000064  E5801000  STR         R1,[R0,#0x0] ; SPI0Status
   43:     TxCounter++;
 00000068  E5100000  LDR         R0,=TxCounter ; TxCounter
 0000006C  E5901000  LDR         R1,[R0,#0x0] ; TxCounter
 00000070  E2811001  ADD         R1,R1,#0x0001
ARM COMPILER V2.53,  spi                                                                   19/12/07  10:53:13  PAGE 5   

 00000074  E5801000  STR         R1,[R0,#0x0] ; TxCounter
   44:     }
 00000078          L_2:
   45:     IDISABLE;
 00000078  E8BD4000  LDMFD       R13!,{LR}
 0000007C  E321F092  MSR         CPSR_c,#0x92
 00000080  E8BD4000  LDMFD       R13!,{LR}
 00000084  E16FF00E  MSR         SPSR_cxsf,R14
   46:     VICVectAddr = 0;        /* Acknowledge Interrupt */
 00000088  E3A01000  MOV         R1,#0x0
 0000008C  E5100000  LDR         R0,=0xFFFFF030
 00000090  E5801000  STR         R1,[R0,#0x0]
 00000094            ; SCOPE-END
   47: }
 00000094  E8BD4007  LDMIA       R13!,{R0-R2,LR}
 00000098  E25EF004  SUBS        R15,R14,#0x0004
 0000009C          ENDP ; 'SPI0Handler?A'


*** CODE SEGMENT '?PR?SPIInit?T?spi':
   61:     TxCounter = 0;
 00000000  2100      MOV         R1,#0x0
 00000002  4800      LDR         R0,=TxCounter ; TxCounter
 00000004  6001      STR         R1,[R0,#0x0] ; TxCounter
   63:     S0SPCR = 0x00;
 00000006  4800      LDR         R0,=0xE0020000
 00000008  6001      STR         R1,[R0,#0x0]
   64:     PINSEL0 &= 0xFFFF00FF;
 0000000A  4800      LDR         R2,=0xFF00
 0000000C  4800      LDR         R0,=0xE002C000
 0000000E  6801      LDR         R1,[R0,#0x0]
 00000010  4391      BIC         R1,R2
 00000012  6001      STR         R1,[R0,#0x0]
   65:     PINSEL0 |= 0x00001500;
 00000014  4800      LDR         R2,=0x1500
 00000016  4800      LDR         R0,=0xE002C000
 00000018  6801      LDR         R1,[R0,#0x0]
 0000001A  4311      ORR         R1,R2
 0000001C  6001      STR         R1,[R0,#0x0]
   66:     IODIR0 = SPI0_SEL;
 0000001E  2180      MOV         R1,#0x80
 00000020  4800      LDR         R0,=0xE0028008
 00000022  6001      STR         R1,[R0,#0x0]
   67:     IOSET0 = SPI0_SEL;
 00000024  4800      LDR         R0,=0xE0028004
 00000026  6001      STR         R1,[R0,#0x0]
   71:     S0SPCCR = 0x8;
 00000028  2108      MOV         R1,#0x8
 0000002A  4800      LDR         R0,=0xE002000C
 0000002C  6001      STR         R1,[R0,#0x0]
   80:     S0SPCR = SPI0_MSTR;
 0000002E  2120      MOV         R1,#0x20
 00000030  4800      LDR         R0,=0xE0020000
 00000032  6001      STR         R1,[R0,#0x0]
   82:     return( TRUE );
 00000034  2001      MOV         R0,#0x1
   83: }
 00000036  4770      BX          R14
 00000038          ENDP ; 'SPIInit?T'


*** CODE SEGMENT '?PR?SPISend?T?spi':
   96: void SPISend( BYTE *buf, DWORD Length )
 00000000  B410      PUSH        {R4}
 00000002  ---- Variable 'Length' assigned to Register 'R1' ----
 00000002  ---- Variable 'buf' assigned to Register 'R0' ----
   97: {
 00000002            ; SCOPE-START
  101:     if ( Length == 0 )
 00000002  1C0A      MOV         R2,R1 ; Length
ARM COMPILER V2.53,  spi                                                                   19/12/07  10:53:13  PAGE 6   

 00000004  2A00      CMP         R2,#0x0 ; Length
 00000006  D012      BEQ         L_5  ; T=0x0000002E
  103:     for ( i = 0; i < Length; i++ )
 00000008  2200      MOV         R2,#0x0
 0000000A  ---- Variable 'i' assigned to Register 'R2' ----
 0000000A  E00C      B           L_8  ; T=0x00000026
 0000000C          L_9:
  105:     S0SPDR = *buf;
 0000000C  1C03      MOV         R3,R0 ; buf
 0000000E  781C      LDRB        R4,[R3,#0x0] ; buf
 00000010  4800      LDR         R3,=0xE0020008
 00000012  601C      STR         R4,[R3,#0x0]
  114:     while ( !(S0SPSR & SPIF) );
 00000014          L_11:
 00000014  4800      LDR         R3,=0xE0020004
 00000016  681B      LDR         R3,[R3,#0x0]
 00000018  2480      MOV         R4,#0x80
 0000001A  4223      TST         R3,R4
 0000001C  D0FA      BEQ         L_11  ; T=0x00000014
  116:     Dummy = S0SPDR;     /* Flush the RxFIFO */
 0000001E  4800      LDR         R3,=0xE0020008
 00000020  681B      LDR         R3,[R3,#0x0]
  117:     buf++;
 00000022  3001      ADD         R0,#0x1
  118:     }
 00000024  3201      ADD         R2,#0x1
 00000026          L_8:
 00000026  1C0C      MOV         R4,R1 ; Length
 00000028  1C13      MOV         R3,R2 ; i
 0000002A  42A3      CMP         R3,R4 ; i
 0000002C  D3EE      BCC         L_9  ; T=0x0000000C
  119:     return; 
 0000002E            ; SCOPE-END
  120: }
 0000002E          L_5:
 0000002E  BC10      POP         {R4}
 00000030  4770      BX          R14
 00000032          ENDP ; 'SPISend?T'


*** CODE SEGMENT '?PR?SPIReceive?T?spi':
  130: void SPIReceive( BYTE *buf, DWORD Length )
 00000000  B570      PUSH        {R4-R6,LR}
 00000002  1C0E      MOV         R6,R1 ; Length
 00000004  ---- Variable 'Length' assigned to Register 'R6' ----
 00000004  1C05      MOV         R5,R0 ; buf
 00000006  ---- Variable 'buf' assigned to Register 'R5' ----
  131: {
 00000006            ; SCOPE-START
  134:     for ( i = 0; i < Length; i++ )
 00000006  2400      MOV         R4,#0x0
 00000008  ---- Variable 'i' assigned to Register 'R4' ----
 00000008  E005      B           L_17  ; T=0x00000016
 0000000A          L_18:
  136:     *buf = SPIReceiveByte();
 0000000A  F7FF      BL          SPIReceiveByte?T  ; T=0x0001  (1)
 0000000C  FFF9      BL          SPIReceiveByte?T  ; T=0x0001  (2)
 0000000E  1C29      MOV         R1,R5 ; buf
 00000010  7008      STRB        R0,[R1,#0x0] ; buf
  137:     buf++;
 00000012  3501      ADD         R5,#0x1
  138:     }
 00000014  3401      ADD         R4,#0x1
 00000016          L_17:
 00000016  1C31      MOV         R1,R6 ; Length
 00000018  1C20      MOV         R0,R4 ; i
 0000001A  4288      CMP         R0,R1 ; i
 0000001C  D3F5      BCC         L_18  ; T=0x0000000A
ARM COMPILER V2.53,  spi                                                                   19/12/07  10:53:13  PAGE 7   

  139:     return; 
 0000001E            ; SCOPE-END
  140: }
 0000001E  BC70      POP         {R4-R6}
 00000020  BC08      POP         {R3}
 00000022  4718      BX          R3
 00000024          ENDP ; 'SPIReceive?T'


*** CODE SEGMENT '?PR?SPIReceiveByte?T?spi':
  155: {
 00000000            ; SCOPE-START
  159:     S0SPDR = 0xFF;
 00000000  21FF      MOV         R1,#0xFF
 00000002  4800      LDR         R0,=0xE0020008
 00000004  6001      STR         R1,[R0,#0x0]
  169:     while ( !(S0SPSR & SPIF) );
 00000006          L_21:
 00000006  4800      LDR         R0,=0xE0020004
 00000008  6800      LDR         R0,[R0,#0x0]
 0000000A  2180      MOV         R1,#0x80
 0000000C  4208      TST         R0,R1
 0000000E  D0FA      BEQ         L_21  ; T=0x00000006
  171:     data = S0SPDR;
 00000010  4800      LDR         R0,=0xE0020008
 00000012  6801      LDR         R1,[R0,#0x0]
 00000014  0609      LSL         R1,R1,#0x18
 00000016  0E09      LSR         R1,R1,#0x18
 00000018  ---- Variable 'data' assigned to Register 'R1' ----
  172:     return ( data ); 
 00000018  1C08      MOV         R0,R1 ; data
 0000001A  0600      LSL         R0,R0,#0x18 ; data
 0000001C  0E00      LSR         R0,R0,#0x18
 0000001E            ; SCOPE-END
  173: }
 0000001E  4770      BX          R14
 00000020          ENDP ; 'SPIReceiveByte?T'



Module Information          Static
----------------------------------
  code size            =    ------
  data size            =         8
  const size           =    ------
End of Module Information.


ARM COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)

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