syslib.c

ADS88x BSP

    return memTop;
    }


/******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  Normally, it is called
* only by reboot()--which services ^X--and bus errors at interrupt level.
* However, in some circumstances, the user may wish to introduce a
* <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
     int startType	/* parameter passed to ROM to tell it how to boot */
    )
    {
    FUNCPTR pRom = (FUNCPTR) (ROM_TEXT_ADRS + 4);	/* Warm reboot */

#if defined(INCLUDE_CACHE_SUPPORT)
    cacheDisable (0);        /* Disable the Instruction Cache */
    cacheDisable (1);        /* Disable the Data Cache */
#endif
    *CIMR(vxImmrIsbGet()) = 0;     /* disable all cpm interupts */
 
#ifdef INCLUDE_MOT_FEC
    /* disable the FEC */
    sysFecEnetDisable ( vxImmrIsbGet(),0);
    sysFecEnetDisable ( vxImmrIsbGet(),1);
#endif /* INCLUDE_MOT_FEC */
    sysSerialReset();		/* reset the serail device */

    /* Clear the MSR */
    vxMsrSet (0);

    WRS_ASM("sync");

    (*pRom) (startType);	/* jump to bootrom entry point */

    return (OK);	/* in case we ever continue from ROM monitor */
    }

/******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.
*
* RETURNS: N/A
*/

void sysHwInit2 (void)
    {
    static BOOL configured = FALSE;
    int		immrVal;

    if (!configured)
	{

	immrVal = vxImmrIsbGet();

	/* initialize serial interrupts */

	sysSerialHwInit2();
#ifdef USE_KEYED_REGS
    * SCCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;
    ISYNC;
#endif
	* SCCR(immrVal) &= ~SCCR_TBS;
#ifdef USE_KEYED_REGS
    * SCCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);
#endif

	/* un-freeze the Time Base clock */

#ifdef USE_KEYED_REGS
    * TBSCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;
    ISYNC;
#endif
         
	* TBSCR(immrVal) = TBSCR_TBE ;
#ifdef USE_KEYED_REGS
    * TBSCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);
    ISYNC;
#endif

	configured = TRUE;
	}
    }

/******************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
* 
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return (sysProcNum);
    }

/******************************************************************************
*
* sysProcNumSet - set the processor number
*
* This routine sets the processor number for the CPU board.  Processor numbers
* should be unique on a single backplane.
*
* Not applicable for the busless 860Ads.
*
* RETURNS: N/A
*
* SEE ALSO: sysProcNumGet()
*
*/

void sysProcNumSet
    (
    int 	procNum			/* processor number */
    )
    {
    sysProcNum = procNum;
    }

/******************************************************************************
*
* sysLocalToBusAdrs - convert a local address to a bus address
*
* This routine gets the VMEbus address that accesses a specified local
* memory address.
*
* Not applicable for the 860Ads
*
* RETURNS: ERROR, always.
*
* SEE ALSO: sysBusToLocalAdrs()
*/
 
STATUS sysLocalToBusAdrs
    (
    int 	adrsSpace,	/* bus address space where busAdrs resides */
    char *	localAdrs,	/* local address to convert */ 
    char **	pBusAdrs	/* where to return bus address */ 
    )
    {
    return (ERROR);
    }

/******************************************************************************
*
* sysBusToLocalAdrs - convert a bus address to a local address
*
* This routine gets the local address that accesses a specified VMEbus
* physical memory address.
*
* Not applicable for the 860Ads
*
* RETURNS: ERROR, always.
*
* SEE ALSO: sysLocalToBusAdrs()
*/

STATUS sysBusToLocalAdrs
    (
     int  	adrsSpace, 	/* bus address space where busAdrs resides */
     char *	busAdrs,   	/* bus address to convert */
     char **	pLocalAdrs 	/* where to return local address */
    )
    {
    return (ERROR);
    }

/******************************************************************************
*
* sysBusTas - test and set a location across the bus
*
* This routine does an atomic test-and-set operation across the backplane.
*
* Not applicable for the 860Ads.
*
* RETURNS: FALSE, always.
*
* SEE ALSO: vxTas()
*/

BOOL sysBusTas
    (
     char *	adrs		/* address to be tested-and-set */
    )
    {
    return (FALSE);
    }

/******************************************************************************
*
* sysBusClearTas - test and clear 
*
* This routine is a null function.
*
* RETURNS: N/A
*/

void sysBusClearTas
    (
     volatile char * address	/* address to be tested-and-cleared */
    )
    {
    } 

#ifdef INCLUDE_MOT_FEC

/*******************************************************************************
*
* sysFecEnetEnable - enable the MII interface of the Fast Ethernet controller
*
* This routine is expected to perform any target specific functions required
* to enable the Ethernet device and the MII interface of the Fast Ethernet 
* controller. These functions include setting the MII-compliant signals on 
* Port D and disabling the IRQ7 signal.
*
* This routine does not enable the 7-wire serial interface.
*
* RETURNS: OK, or ERROR if the Fast Ethernet controller cannot be enabled.
*/

STATUS sysFecEnetEnable
    (
    UINT32	motCpmAddr,	/* base address of the on-chip RAM */
    UINT32      fecNum
    )
    {

    /* enable the Ethernet device for the FEC */

    if (fecNum == 1)
      {
       * (UINT8 *)BCSR5 &= ~(BCSR5_MII2_EN | BCSR5_MII2_RST); /* Reset PHYs */
      }
    if (fecNum == 0)
      {
       * (UINT8 *)BCSR5 &= ~(BCSR5_MII_EN | BCSR5_MII_RST); /* Reset PHYs */
      }

    /* introduce a little delay */

    taskDelay (sysClkRateGet ()*3);

    /* mask IRQ7 off, as it is shared with MII_TX_CLK */

    *SIMASK (motCpmAddr) &= ~( SIMASK_IRM7);

    /* also clear any pending interrupt */

    *SIPEND (motCpmAddr) |= (SIPEND_IRQ7);

    /* 
     * set the arbitration level for the FEC. Do not enable
     * FEC aggressive mode.
     */

    *SDCR (motCpmAddr) |= SDCR_FAID_BR6;

    /* set Ports to use MII signals */

    if (fecNum==0)
      {
	*PAPAR (motCpmAddr) |= PA11 | PA10 | PA04 | PA03 | PA02 | PA01 | PA00;
	*PADIR (motCpmAddr) |= PA11 | PA10 | PA04;
	*PBPAR (motCpmAddr) |= PB31 | PB19 ;
	*PCPAR (motCpmAddr) |= PC13 | PC12;
	*PEPAR (motCpmAddr) |= (PE31 | PE30);
	*PEDIR (motCpmAddr) |= (PE31 | PE30);
      }

    if (fecNum==1)
      {
	*PEPAR (motCpmAddr) |= ( PE29 | PE28 | PE27 | PE26 | PE25 | 
				 PE24 | PE23 | PE22 | PE21 | PE20 | 
				 PE19 | PE18 | PE17 | PE16 | PE15 | PE14);
	*PEDIR (motCpmAddr) |= ( PE29 | PE28 | PE27 | PE26 | PE25 | 
				 PE24 | PE23 | PE22 | PE21 | PE20 | 
				 PE19 | PE18 | PE17 | PE16 | PE15 | PE14);
	*PESO (motCpmAddr) |=  ( PE20 | PE19 | PE18 |
				 PE17 | PE15 | PE14);
      }


    *PDPAR (motCpmAddr) |= PD08;


    return (OK);
    }

/*******************************************************************************
*
* sysFecEnetDisable - disable MII interface to the Fast Ethernet controller
*
* This routine is expected to perform any target specific functions required
* to disable the Ethernet device and the MII interface to the Fast Ethernet 
* controller.  This involves restoring the default values for all the Port 
* D signals.
*
* RETURNS: OK, always.
*/

STATUS sysFecEnetDisable
    (
    UINT32	motCpmAddr,	/* base address of the on-chip RAM */
    UINT32      fecNum
    )
    {

    /* Need to split this up into 2 devices */

    /* disable the Ethernet device for the FEC */

    if (fecNum==0)
      {
	*PAPAR (motCpmAddr) &= ~(PA11 | PA10 | PA04 | PA03 | PA02 | 
				 PA01 | PA00);
	*PADIR (motCpmAddr) &= ~(PA11 | PA10 | PA04);
	*PBPAR (motCpmAddr) &= ~(PB31 | PB19) ;
	*PCPAR (motCpmAddr) &= ~(PC13 | PC12);
	*PEPAR (motCpmAddr) &= ~(PE31 | PE30);
	*PEDIR (motCpmAddr) &= ~(PE31 | PE30);
      }

    if (fecNum==1)
      {
	*PEPAR (motCpmAddr) &= ~( PE29 | PE28 | PE27 | PE26 | PE25 | 
				 PE24 | PE23 | PE22 | PE21 | PE20 | 
				 PE19 | PE18 | PE17 | PE16 | PE15 | PE14);
	*PEDIR (motCpmAddr) &= ~( PE29 | PE28 | PE27 | PE26 | PE25 | 
				 PE24 | PE23 | PE22 | PE21 | PE20 | 
				 PE19 | PE18 | PE17 | PE16 | PE15 | PE14);
	*PESO (motCpmAddr) &=  ~( PE20 | PE19 | PE18 |
				 PE17 | PE15 | PE14);
      }
    
    if (fecNum == 1)
      {
       * (UINT8 *)BCSR5 |= (BCSR5_MII2_EN | BCSR5_MII2_RST); /* Reset PHYs */
      }
    if (fecNum == 0)
      {
       * (UINT8 *)BCSR5 |= (BCSR5_MII_EN | BCSR5_MII_RST); /* Reset PHYs */
      }

    return (OK);
    }

/*******************************************************************************
*
* sysFecEnetAddrGet - get the hardware Ethernet address
*
* This routine provides the six byte Ethernet hardware address that will be
* used by each individual Fast Ethernet device unit.  This routine must copy
* the six byte address to the space provided by <addr>.
*
* RETURNS: OK, or ERROR if the Ethernet address cannot be returned.
*/

STATUS sysFecEnetAddrGet
    (
    UINT32	unit,	/* base address of the on-chip RAM */
    UCHAR *	addr		/* where to copy the Ethernet address */
    )
    {
    bcopy ((char *) sysFecEnetAddr[unit], (char *) addr, sizeof (sysFecEnetAddr));

    return (OK);
    }

#endif /* INCLUDE_MOT_FEC */