syslib.c

ADS88x BSP

/* sysLib.c - Motorola DUETads board system-dependent library */

/* Copyright 1984-2005 Wind River Systems, Inc. */
#include "copyright_wrs.h"

/*
modification history
--------------------
01d,30mar05,mig  Fix compile warnings.
01c,03dec04,dtr  Subtract PM_RESERVED_MEM from memTop for EDR.
01b,08mar04,dtr  Add Security engine mapping.
01a,20feb04,dtr  created from ads860/sysLib.c.
*/

/*
DESCRIPTION
This library provides board-specific routines.  The chip drivers included are:

    ppc860Timer.c	- PowerPC/860 Timer library

INCLUDE FILES: sysLib.h

SEE ALSO:
.pG "Configuration"
*/

/* includes */

#include "vxWorks.h"
#include "vme.h"
#include "memLib.h"
#include "cacheLib.h"
#include "sysLib.h"
#include "config.h"
#include "string.h"
#include "intLib.h"
#include "logLib.h"
#include "stdio.h"
#include "taskLib.h"
#include "vxLib.h"
#include "tyLib.h"
#include "arch/ppc/vxPpcLib.h"
#include "private/vmLibP.h"

#include "drv/multi/ppc860Siu.h"
#include "ads88x.h"

IMPORT UINT32   vx860KeyedRegUsed;
IMPORT void     vxPlprcrSet (UINT32*,UINT32,UINT32);

#define ISYNC WRS_ASM(" isync");

PHYS_MEM_DESC sysPhysMemDesc [] =
    {
    {
    (VIRT_ADDR) LOCAL_MEM_LOCAL_ADRS,
    (PHYS_ADDR) LOCAL_MEM_LOCAL_ADRS,
    LOCAL_MEM_SIZE ,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE
    },

    {
    (VIRT_ADDR) 0x02000000,
    (PHYS_ADDR) 0x02000000,
    0x00001000,				/* 4 k - Board Control and Status register 5 */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
    VM_STATE_GUARDED
    },

    {
    (VIRT_ADDR) BCSR0,
    (PHYS_ADDR) BCSR0,
    0x00001000,				/* 4 k - Board Control and Status */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
    VM_STATE_GUARDED
    },

#ifdef INCLUDE_TFFS
    {
    (VIRT_ADDR) PC_BASE_ADRS_0,
    (PHYS_ADDR) PC_BASE_ADRS_0,
    PC_SIZE_0,                          /* 1 m - PCMCIA window 0 */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
    VM_STATE_GUARDED
    },

    {
    (VIRT_ADDR) PC_BASE_ADRS_1,
    (PHYS_ADDR) PC_BASE_ADRS_1,
    PC_SIZE_1,                          /* 32 m - PCMCIA window 1 */
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
    VM_STATE_GUARDED
    },
#endif /* INCLUDE_TFFS */

    {
    (VIRT_ADDR) INTERNAL_MEM_MAP_ADDR,
    (PHYS_ADDR) INTERNAL_MEM_MAP_ADDR,
    INTERNAL_MEM_MAP_SIZE,		/* 64 k - Internal Memory Map */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT  |
    VM_STATE_GUARDED
    },

    {
    (VIRT_ADDR) ROM_BASE_ADRS,
    (PHYS_ADDR) ROM_BASE_ADRS,
    ROM_SIZE,				/* Flash memory */	
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE ,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT 
    }

#ifdef INCLUDE_SECURITY_ENGINE
    , /* Security Block */
    {
    (VIRT_ADDR) SEC1_ADDR,
    (PHYS_ADDR) SEC1_ADDR,
    SEC1_SIZE,
    VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE |
    VM_STATE_MASK_GUARDED,
    VM_STATE_VALID      | VM_STATE_WRITABLE      | VM_STATE_CACHEABLE_NOT |
    VM_STATE_MASK_GUARDED
    }
#endif /* INCLUDE_SECURITY_ENGINE */
    };

int sysPhysMemDescNumEnt = NELEMENTS (sysPhysMemDesc);

int   sysBus      = BUS;                /* system bus type (VME_BUS, etc) */
int   sysCpu      = CPU;                /* system CPU type (PPC860) */
char *sysBootLine = BOOT_LINE_ADRS;	/* address of boot line */
char *sysExcMsg   = EXC_MSG_ADRS;	/* catastrophic message area */
int   sysProcNum;			/* processor number of this CPU */
int   sysFlags;				/* boot flags */
char  sysBootHost [BOOT_FIELD_LEN];	/* name of host from which we booted */
char  sysBootFile [BOOT_FIELD_LEN];	/* name of file from which we booted */
BOOL  sysVmeEnable = FALSE;		/* by default no VME */

#ifdef INCLUDE_MOT_FEC

/* set the following array to a unique Ethernet hardware address */

unsigned char sysFecEnetAddr [2][6] = {{0x08, 0x00, 0x3e, 0x32, 0x53, 0x22},
				       {0x08, 0x00, 0x3e, 0x32, 0x53, 0x23}};

IMPORT STATUS sysFecEnetDisable (UINT32 motCpmaddr,UINT32 fecNum);

#endif /* INCLUDE_MOT_FEC */

#include "sysSerial.c"
#include "intrCtl/ppc860Intr.c"
#include "mem/nullNvRam.c"

#ifdef INCLUDE_AUX_CLK
#include "timer/ppc860Timer.c"		/* PPC860 & 821 have on chip timers */
#else
#include "timer/ppcDecTimer.c"
#endif /* INCLUDE_AUX_CLK */


/******************************************************************************
*
* sysModel - return the model name of the CPU board
*
* This routine returns the model name of the CPU board.
*
* RETURNS: A pointer to the string.
*/

char * sysModel (void)
    {
    return ("Motorola ADS - PowerPC 88x");
    }

/******************************************************************************
*
* sysBspRev - return the bsp version with the revision eg 1.0/<x>
*
* This function returns a pointer to a bsp version with the revision.
* for eg. 1.0/<x>. BSP_REV defined in config.h is concatanated to
* BSP_VERSION and returned.
*
* RETURNS: A pointer to the BSP version/revision string.
*/

char * sysBspRev (void)
    {
    return (BSP_VERSION BSP_REV);
    }

#ifdef INCLUDE_SYS_HW_INIT_0
/******************************************************************************
* sysHwInit0 - Used here to enable extended exception vector support.
*
* RETURNS: None.
*/ 

void sysHwInit0 () 
{
excExtendedVectors=TRUE; 
}
#endif /*INCLUDE_SYS_HWINIT_0 */

/******************************************************************************
*
* sysHwInit - initialize the system hardware
*
* This routine initializes various feature of the MPC860ADS boards. It sets up
* the control registers, initializes various devices if they are present.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
    {
    UINT32	immrVal = vxImmrIsbGet();
    UINT32      plprcrVal;

    /* set the SPLL to the value requested */
    /* SPR 65678, wrap PLPRCR, SCC in unlock/lock code */
#ifdef USE_KEYED_REGS
    vx860KeyedRegUsed=TRUE;
#endif

#ifdef USE_KEYED_REGS
    * PLPRCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;
    ISYNC;
#endif

    plprcrVal = PLPRCR_VAL;
    /* delay will be (3 * 16) + 2 clock cycles */
    vxPlprcrSet ( (UINT32*)immrVal ,plprcrVal ,3 );

#ifdef USE_KEYED_REGS
    * PLPRCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);
#endif

    /* set the BRGCLK division factor */

#ifdef USE_KEYED_REGS
    * SCCRK(immrVal) = KEYED_REG_UNLOCK_VALUE;
    ISYNC;
#endif

    /* set the BRGCLK division factor */

    * SCCR(immrVal) = (* SCCR(immrVal) & ~SCCR_DFBRG_MSK) |
				(BRGCLK_DIV_FACTOR << SCCR_DFBRG_SHIFT);

#ifdef USE_KEYED_REGS
    * SCCRK(immrVal) = (UINT32)(~KEYED_REG_UNLOCK_VALUE);
#endif

    /* set the Periodic Timer A value */
     
    * MAMR(immrVal) = (* MAMR(immrVal) & ~MAMR_PTA_MSK) | 
				(PTA_VALUE << MAMR_PTA_SHIFT);	

    /* set the Periodic Timer PreScale */

    * MPTPR(immrVal) = PTP_VALUE;

    /* reset the port A */

    *PAPAR(immrVal) = 0;
    *PADIR(immrVal) = 0;
    *PAODR(immrVal) = 0;

    /* reset the port B */

    *PBPAR(immrVal) = 0;
    *PBDIR(immrVal) = 0;
    *PBODR(immrVal) = 0;

    /* reset the port C */

    *PCPAR(immrVal) = 0;
    *PCDIR(immrVal) = 0;
    *PCSO(immrVal)  = 0;

    /* reset the port D */

    *PDPAR(immrVal) = 0;
    *PDDIR(immrVal) = 0;

    *SICR(immrVal) = 0;			/* initialize SI/NMSI connections */

    /* Initialize interrupts */

    ppc860IntrInit(IV_LEVEL4);	/* default vector level */

    /* Reset serial channels */

    sysSerialHwInit();

    /* make sure Ethernet is disabled */

#ifdef INCLUDE_MOT_FEC

    /* make sure the FEC is disabled */

    sysFecEnetDisable (immrVal,0);
    sysFecEnetDisable (immrVal,1);

#endif /* INCLUDE_MOT_FEC */

    /*
     * The power management mode is initialized here. Reduced power mode
     * is activated only when the kernel is iddle (cf vxPowerDown).
     * Power management mode is selected via vxPowerModeSet().
     * DEFAULT_POWER_MGT_MODE is defined in config.h.
     */

    vxPowerModeSet (DEFAULT_POWER_MGT_MODE);

#ifdef  FORCE_DEFAULT_BOOT_LINE
    strncpy (sysBootLine, DEFAULT_BOOT_LINE, strlen(DEFAULT_BOOT_LINE)+1);
    sysBootLine[strlen(DEFAULT_BOOT_LINE)] = 0;
#endif
    }

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
    {
    static char * physTop = NULL;

    if (physTop == NULL)
	{
	physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);
	}

    return (physTop) ;
    }

/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	memTop = sysPhysMemTop () - USER_RESERVED_MEM;
#ifdef INCLUDE_EDR_PM

        /* account for ED&R persistent memory */

        memTop = memTop - PM_RESERVED_MEM;
#endif

	}