📄 programmable clock generator internal input clock.c
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//Register Definitions
#define SRU_CLK3 0x2434
#define SRU_PIN0 0x2460
#define SRU_PBEN0 0x2478
#define PCG_CTLB0 0x24C2
#define PCG_CTLB1 0x24C3
#define PCG_PW 0x24C4
//SRU Definitions
#define PCG_CLKB_P 0x39
#define PCG_FSB_P 0x3B
#define PBEN_HIGH_Of 0x01
//Bit Positions
#define PCG_EXTB_I 5
#define DAI_PB02 6
#define PCG_PWB 16
//Bit Definitions
#define ENFSB 0x40000000
#define ENCLKB 0x80000000
void main()
{
* (volatile int *) SRU_PIN0 = (PCG_CLKB_P|(PCG_FSB_P<<DAI_PB02));
* (volatile int *) SRU_PBEN0 = (PBEN_HIGH_Of|(PBEN_HIGH_Of<<DAI_PB02));
* (volatile int *) PCG_PW =(1<<PCG_PWB);
* (volatile int *) PCG_CTLB0 = (ENFSB|ENCLKB|10); //FS Divisor & FS Phase 0-9
* (volatile int *) PCG_CTLB1 = 10; //Clk Divisor & FS Phase 0-9
for(;;){}
}
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