parallel port dma driven.c

来自「ADI 公司的DSP ADSP21262 EZ-KIT LITE开发板的全部源代」· C语言 代码 · 共 88 行

/* Register Definitions */
#define PPCTL       0x1800
#define EIPP        0x1810
#define EMPP        0x1811
#define ECPP        0x1812
#define IIPP        0x1818
#define IMPP        0x1819
#define ICPP        0x181a

/* Register Bit Definitions */
#define PPEN    0x00000001
#define PPDUR4  0x00000006
#define PPBHC   0x00000040
#define PPDEN   0x00000100
#define PPTRAN  0x00000200
#define PPBS    0x00020000
#define PPDS    0x00010000

/* External Memory Location */
#define EXTBUFF 0x1200000

/* Source Buffer */
int dest[8];
int source[8] = {0x11111111,
                 0x22222222,
                 0x33333333,
                 0x44444444,
                 0x55555555,
                 0x66666666,
                 0x77777777,
                 0x88888888};

main(){
* (volatile int *)PPCTL = 0;

/* initiate parallel port DMA registers*/
* (volatile int *)IIPP = (int) source;
* (volatile int *)IMPP = 1;
* (volatile int *)ICPP = sizeof(source);

* (volatile int *)EMPP = 1;
* (volatile int *)EIPP = EXTBUFF;
/* For 8-bit external memory, the External count is
    four times the internal count */
* (volatile int *)ECPP = sizeof(source) * 4;

* (volatile int *)PPCTL =  PPTRAN|    /* transmit (write) */
         PPBHC|     /* implement a bus hold cycle*/
         PPDUR4;   /* make pp data cycles last for a */
                    /* duration of 4 cclk cycles */

/* initiate PP DMA*/
/*Enable Parallel Port and PP DMA in same cycle*/
* (volatile int *)PPCTL |= PPDEN|PPEN;

/*poll to ensure parallel port has completed the transfer*/
do{
;}
while( (* (volatile int *)PPCTL & (PPBS|PPDS) ) != 0);

/* Turn of the Parallel Port */
* (volatile int *)PPCTL = 0;

/* initiate parallel port DMA registers*/
* (volatile int *)IIPP = (int) dest;
* (volatile int *)IMPP = 1;
* (volatile int *)ICPP = sizeof(dest);

* (volatile int *)EMPP = 1;
* (volatile int *)EIPP = EXTBUFF;
/* For 8-bit external memory, the External count is
    four times the internal count */
* (volatile int *)ECPP = sizeof(dest) * 4;

* (volatile int *)PPCTL =  PPBHC|     /* implement a bus hold cycle*/
         PPDUR4;   /* make pp data cycles last for a */
                    /* duration of 4 cclk cycles */

/* initiate PP DMA*/
/*Enable Parallel Port and PP DMA in same cycle*/
* (volatile int *)PPCTL |= PPDEN|PPEN;

/*poll to ensure parallel port has completed the transfer*/
do{
;}
while( (* (volatile int *)PPCTL & (PPBS|PPDS)) != 0);
}