sram_test.c

来自「ADI 公司的DSP ADSP21262 EZ-KIT LITE开发板的全部源代」· C语言 代码 · 共 146 行

#include <cdef21262.h>
#include <def21262.h>
#include <string.h>


/* External Memory Location */

#define SRAM_ADDRESS	0x1200000
#define BUFFER_SIZE		0x600

void WriteSRAM( unsigned long ulStart, long lCount, long lStride, int *pnData );
void ReadSRAM( unsigned long ulStart, long lCount, long lStride, int *pnData );



int TEST_SRAM(void)
{
    
	int i = 0;
	int write_data=0;
	int read_data=0;


	//turn off PPFLGS, or SRAM stop working
	*pSYSCTL &= (~PPFLGS);


	int AFP_Offset = 0;
	int AFP_Stride = 1;

	// the size of ExtMem memory is 4MB, 8 times of data buffer
	for( i=0; i<0x100000; i++)
	{
		if(write_data>0xff)
			write_data = 0;

		WriteSRAM( AFP_Offset, 1, AFP_Stride, (int *)&write_data );
		ReadSRAM( AFP_Offset, 1, AFP_Stride, (int *)&read_data );
		read_data &= 0xff; //mask the first 3 bytes
		if(write_data!=read_data)
		{
			//error
			//turn on PPFLGS
			*pSYSCTL |= PPFLGS;
			return false;
		}
		AFP_Offset++;
		write_data++;

	}
	
	*pSYSCTL |= PPFLGS;
	return true;	
}    


void  WriteSRAM(unsigned long ulStart, long lCount, long lStride, int *pnData )
{  
	
	*pPPCTL = 0;
	// initiate parallel port DMA registers
	*pIIPP = (int) pnData;
	*pIMPP = 1;
	*pICPP = 1;

	*pEMPP = 1;
	*pEIPP = SRAM_ADDRESS+ulStart;
	//For 8-bit external memory, the External count is
	//    four times the internal count 
	*pECPP = 4;

	*pPPCTL = PPTRAN|    // transmit (write) 
	          PPBHC|     // implement a bus hold cycle
	          PPDUR4;   // make pp data cycles last for a 
	                    // duration of 4 cclk cycles 

	// initiate PP DMA
	//Enable Parallel Port and PP DMA in same cycle
	*pPPCTL |= PPDEN|PPEN;

	//poll to ensure parallel port has completed the transfer
	do{
	;}
	while( (*pPPCTL & (PPBS|PPDS) ) != 0);		
}


void ReadSRAM( unsigned long ulStart, long lCount, long lStride, int *pnData )
{
	// Turn of the Parallel Port 
	*pPPCTL = 0;

	// initiate parallel port DMA registers
	*pIIPP = (int) pnData;
	*pIMPP = 1;
	*pICPP = 1;

	*pEMPP = 1;
	*pEIPP = SRAM_ADDRESS+ulStart;
	// For 8-bit external memory, the External count is
	//    four times the internal count 
	*pECPP =  4;

	*pPPCTL = PPBHC|     // implement a bus hold cycle
	          PPDUR4;   // make pp data cycles last for a 
	                    // duration of 4 cclk cycles 

	// initiate PP DMA
	//Enable Parallel Port and PP DMA in same cycle
	*pPPCTL |= PPDEN|PPEN;

	//poll to ensure parallel port has completed the transfer
	do{
	;}
	while( (*pPPCTL & (PPBS|PPDS)) != 0);


}


/*********************************************************************
*
*	Function:	main
*
*********************************************************************/
#ifdef _STANDALONE_ // use this to run standalone tests
int main(void)
{
	int iStatus;

	asm("nop;");

	while(1)
	{
		iStatus = TEST_SRAM();
		if( 0 == iStatus )
		{
			asm("emuidle;");
		}
	}

}
#endif //#ifdef _STANDALONE_ // use this to run standalone tests