adi_ssl_init.c

ADI公司blackfin DSP开发板BF533 EZ-KIT LITE附带的全部原代码

	
#endif


/*******************************************************************************/
#if defined(__ADSP_MOAB__)                                 /* BF548 EZKit */

	ADI_PWR_COMMAND_PAIR ezkit_power[] = { 
        
    	{ ADI_PWR_CMD_SET_PROC_VARIANT,(void*)ADI_PWR_PROC_BF548SKBC1600 },     /*  600Mhz ADSP-BF548 */   
    	{ ADI_PWR_CMD_SET_PACKAGE,     (void*)ADI_PWR_PACKAGE_MBGA       },     /* in MBGA packaging, as on all EZ-KITS */      
    	{ ADI_PWR_CMD_SET_VDDEXT,      (void*)ADI_PWR_VDDEXT_330         },     /* external voltage supplied to the voltage regulator is 3.3V */  
    	{ ADI_PWR_CMD_SET_CLKIN,       (void*)25                         },     /*  the CLKIN frequency 25 Hz */       
    	{ ADI_PWR_CMD_END,              0                                }      /* indicates end of table */
	};


	ADI_EBIU_TIMING_VALUE RC =   { 8, {60, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles between one active command and the next   */	
	ADI_EBIU_TIMING_VALUE RAS =  { 6, {42, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles between active command and precharge command  */       
 	ADI_EBIU_TIMING_VALUE RP =   { 2, {15, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles between precharge command and active command   */     
	ADI_EBIU_TIMING_VALUE RFC =  { 10,{72, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles for SDRAM to recover from REFRESH signal   */     
	ADI_EBIU_TIMING_VALUE WTR =  { 1, {7500,ADI_EBIU_TIMING_UNIT_PICOSEC }};     /* cycles from last write data until next read command   */  
	ADI_EBIU_TIMING_VALUE tWR =  { 2, {15, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* write recovery time is 2 or 3 cycles   */
	ADI_EBIU_TIMING_VALUE tMRD = { 2, {15, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles from setting of mode   */       
	ADI_EBIU_TIMING_VALUE RCD =  { 2, {15, ADI_EBIU_TIMING_UNIT_NANOSEC  }};     /* cycles from active command to next R/W  */             
	ADI_EBIU_TIMING_VALUE REFI = { 1037,{7777, ADI_EBIU_TIMING_UNIT_NANOSEC}};   /* cycles from one REFRESH signal to the next  */    
 	
		
	ADI_EBIU_COMMAND_PAIR ezkit_ram[] = {           
       	{ ADI_EBIU_CMD_SET_DDR_REFI,    (void*)&REFI   },        /* command to set refresh interval */             
       	{ ADI_EBIU_CMD_SET_DDR_RFC,     (void*)&RFC    },        /* command to set auto refresh period */       
       	{ ADI_EBIU_CMD_SET_DDR_RP,      (void*)&RP     },        /* command to set precharge to active time */          
       	{ ADI_EBIU_CMD_SET_DDR_RAS,     (void*)&RAS    },        /* command to set active to precharge time */       
       	{ ADI_EBIU_CMD_SET_DDR_RC,      (void*)&RC     },        /* command to set active to active time */        
       	{ ADI_EBIU_CMD_SET_DDR_WTR,     (void*)&WTR    },        /* command to set write to read time */                   
       	{ ADI_EBIU_CMD_SET_DDR_DEVICE_SIZE, (void*)0   },        /* command to set size of device */           
       	{ ADI_EBIU_CMD_SET_DDR_CAS,     (void*)2       },        /* command to set cycles from assertion of R/W until first valid data */            
        { ADI_EBIU_CMD_SET_DDR_DEVICE_WIDTH, (void*)2  },        /* command to set width of device */     
       	{ ADI_EBIU_CMD_SET_DDR_EXTERNAL_BANKS,(void*)0 },        /* command to set number of external banks */           
       	{ ADI_EBIU_CMD_SET_DDR_DATA_WIDTH,    (void*)0 },        /* command to set data width */           
       	{ ADI_EBIU_CMD_SET_DDR_WR,      (void*)&tWR    },        /* command to set write recovery time  */                    
       	{ ADI_EBIU_CMD_SET_DDR_MRD,     (void*)&tMRD   },        /* command to set cycles from setting mode reg until next command */          
       	{ ADI_EBIU_CMD_SET_DDR_RCD,     (void*)&RCD    },        /* command to set cycles from active command to a read/write assertion */       
      	{ ADI_EBIU_CMD_END, 0                          }         /* indicate the last command of the table */
	};	
	
		
#endif


/********************************************************************/

	// initialize everything but exit upon the first error
	do {
	
        // initialize the interrupt manager, parameters are
        //      pointer to memory for interrupt manager to use
        //      memory size (in bytes)
        //      location where the number of secondary handlers that can be supported will be stored
       	//      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
        if ((Result = adi_int_Init(InterruptServiceData, sizeof(InterruptServiceData), &i, ADI_SSL_ENTER_CRITICAL)) != ADI_INT_RESULT_SUCCESS) {
    	    break;
        }
    
	    // initialize the EBIU, parameters are
	    //      address of table containing RAM parameters
	    //      0 - always 0 when EBIU initialized before power service
	    // keep going if it's already initialized
	    Result = adi_ebiu_Init(ezkit_ram, 0);
	    if ((Result != ADI_EBIU_RESULT_SUCCESS) && (Result != ADI_EBIU_RESULT_ALREADY_INITIALIZED)) {
    		break;
    	}
	
        // initialize power, parameters are
        //      address of table containing processor information
	    // keep going if it's already initialized
        Result = adi_pwr_Init(ezkit_power);
	    if ((Result != ADI_PWR_RESULT_SUCCESS) && (Result != ADI_PWR_RESULT_ALREADY_INITIALIZED)) {
    	    break;
        }
    
#if defined(__ADSP_BRAEMAR__) || defined(__ADSP_STIRLING__) || defined(__ADSP_MOAB__)
        // initialize port control, parameters are
        //      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
        if ((Result = adi_ports_Init(ADI_SSL_ENTER_CRITICAL)) != ADI_PORTS_RESULT_SUCCESS) {
        	break;
        }
#endif        

        // initialize deferred callback service if needed, parameters are
        //      pointer to data
        //      size of data
        //      location where number of servers is stored
        //      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
#if     (ADI_SSL_DCB_NUM_SERVERS != 0)
            if ((Result = adi_dcb_Init(DeferredCallbackServiceData, sizeof(DeferredCallbackServiceData), &i, ADI_SSL_ENTER_CRITICAL)) != ADI_DCB_RESULT_SUCCESS) {
        	    break;
            }
#endif

   	    // initialize the dma manager if needed, parameters are
   	    //      pointer to memory for the DMA manager to use
   	    //      memory size (in bytes)
   	    //      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
#if     (ADI_SSL_DMA_NUM_CHANNELS != 0)
	        if ((Result = adi_dma_Init(DMAServiceData, sizeof(DMAServiceData), &i, &adi_dma_ManagerHandle, ADI_SSL_ENTER_CRITICAL)) != ADI_DMA_RESULT_SUCCESS) {
        		break;
    	    }
#endif
	
       	// initialize the flag manager, parameters are
       	//      pointer to memory for the flag service to use
       	//      memory size (in bytes)
       	//      location where the number of flag callbacks that can be supported will be stored
       	//      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
    	if ((Result = adi_flag_Init(FlagServiceData, sizeof(FlagServiceData), &i, ADI_SSL_ENTER_CRITICAL)) != ADI_FLAG_RESULT_SUCCESS) {
		    break;
	    }
	
   	    // initialize the timer manager, parameters are
   	    //      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
	    if ((Result = adi_tmr_Init(ADI_SSL_ENTER_CRITICAL)) != ADI_TMR_RESULT_SUCCESS) {
    		break;
    	}
	
#if !defined(__ADSP_TETON__)
        // initialize the RTC service
        //      parameter for adi_int_EnterCriticalRegion (always NULL for VDK and standalone systems)
        if ((Result = adi_rtc_Init(ADI_SSL_ENTER_CRITICAL)) != ADI_RTC_RESULT_SUCCESS) {
        	break;
        }
#endif        

    	// initialize the device manager if needed, parameters are
    	//      pointer to data for the device manager to use
    	//      size of the data in bytes
    	//      location where the number of devices that can be managed will be stored
    	//      location where the device manager handle will be stored
    	//      parameter for adi_int_EnterCriticalRegion() function (always NULL for standalone and VDK)
#if     (ADI_SSL_DEV_NUM_DEVICES != 0)
    	    if ((Result = adi_dev_Init(DevMgrData, sizeof(DevMgrData), &i, &adi_dev_ManagerHandle, ADI_SSL_ENTER_CRITICAL)) != ADI_DEV_RESULT_SUCCESS) {
    		    break;
	        }
#endif
	    
	 // WHILE (no errors or 1 pass complete)
	 } while (0);
	
    // return
    return (Result);
    
}



/*********************************************************************

	Function:		adi_ssl_Terminate

	Description:	Terminates the system services and device manager
	                for the BF537 EZ-Kit.

*********************************************************************/

u32 adi_ssl_Terminate(void) {

    u32 Result;
    
	// terminate everything but exit upon the first error
	do {
	
    	// terminate the device manager if needed
#if     (ADI_SSL_DEV_NUM_DEVICES != 0)
    	    if ((Result = adi_dev_Terminate(adi_dev_ManagerHandle)) != ADI_DEV_RESULT_SUCCESS) {
    		    break;
	        }
#endif
	    
#if !defined(__ADSP_TETON__)
        // terminate the RTC service
        if ((Result = adi_rtc_Terminate()) != ADI_RTC_RESULT_SUCCESS) {
        	break;
        }
#endif

   	    // terminate the timer manager
	    if ((Result = adi_tmr_Terminate()) != ADI_TMR_RESULT_SUCCESS) {
    		break;
    	}
	
       	// terminate the flag manager
    	if ((Result = adi_flag_Terminate()) != ADI_FLAG_RESULT_SUCCESS) {
		    break;
	    }
	
   	    // terminate the dma manager if needed
#if     (ADI_SSL_DMA_NUM_CHANNELS != 0)
	        if ((Result = adi_dma_Terminate(adi_dma_ManagerHandle)) != ADI_DMA_RESULT_SUCCESS) {
        		break;
    	    }
#endif
	
        // terminate the deferred callback service if needed
#if     (ADI_SSL_DCB_NUM_SERVERS != 0)
            if ((Result = adi_dcb_Terminate()) != ADI_DCB_RESULT_SUCCESS) {
        	    break;
            }
#endif

#if defined(__ADSP_BRAEMAR__) || defined(__ADSP_STIRLING__) || defined(__ADSP_MOAB__)
        // terminate port control
        if ((Result = adi_ports_Terminate()) != ADI_PORTS_RESULT_SUCCESS) {
        	break;
        }
#endif

        // terminate power
        if ((Result = adi_pwr_Terminate()) != ADI_PWR_RESULT_SUCCESS) {
    	    break;
        }
    
	    // terminate the EBIU
	    if ((Result = adi_ebiu_Terminate()) != ADI_EBIU_RESULT_SUCCESS) {
    		break;
    	}
	
        // terminate the interrupt manager
        if ((Result = adi_int_Terminate()) != ADI_INT_RESULT_SUCCESS) {
    	    break;
        }
    
	 // WHILE (no errors or 1 pass complete)
	 } while (0);
	
    // return
    return (Result);
    
}