powerinit.c

ADI公司blackfin DSP开发板BF533 EZ-KIT LITE附带的全部原代码

/*********************************************************************************

Copyright(c) 2005 Analog Devices, Inc. All Rights Reserved. 

This software is proprietary and confidential.  By using this software you agree
to the terms of the associated Analog Devices License Agreement.  

Description:
			 Configures the Power Management and EBIU modules for the 
			 ADSP-BF533 EZ-KIT LITE.
			 
*********************************************************************************/

#include <PowerDemo.h>

static void InitPower(void);
static void InitSDRAM(void);

/*********************************************************************

	Function:		Init

	Description:	Performs Processor specific initialization

*********************************************************************/
void Init(void)
{
	// configure flash for 533
	ezInit(1);

	// Initialize the EBIU module (SDRAM)
	InitSDRAM();
	
	// Initialize the power management module
	InitPower();
	
}

/*********************************************************************

	Function:		InitPower

	Description:	Initializes the Power Management module and sets 
				    the power settings for 0.85V

*********************************************************************/
static void InitPower(void)
{
	ADI_PWR_RESULT 	PWRResult;
	
	// The following command table describes the configuration for the ADSP-BF533 EZ-KIT.
	// All commands (except ADI_PWR_CMD_END) are equivalent to the single command 
	//		{ ADI_PWR_CMD_SET_EZKIT, (void*)ADI_PWR_EZKIT_BF533_600MHZ }
	//
	ADI_PWR_COMMAND_PAIR ezkit_power[] = {	
		{ ADI_PWR_CMD_SET_PROC_VARIANT, (void*)ADI_PWR_PROC_BF533SKBC600  },	// Processor variant
		{ ADI_PWR_CMD_SET_PACKAGE,      (void*)ADI_PWR_PACKAGE_MBGA       },   // Packaging type of processor
		{ ADI_PWR_CMD_SET_VDDEXT,       (void*)ADI_PWR_VDDEXT_330         },	// External voltage supply (3.3V)
		{ ADI_PWR_CMD_SET_CLKIN,        (void*)27 /* MHz */               },   // 27Mhz oscillator connected to CLKIN
		{ ADI_PWR_CMD_END, (void*)0}											// No more commands
	};	

	// Pass the above table to the Intialization routine
	
	PWRResult = adi_pwr_Init( ezkit_power );
	if ((PWRResult != ADI_PWR_RESULT_SUCCESS) && (PWRResult != ADI_PWR_RESULT_CALL_IGNORED)) {
		ezErrorCheck(1);
	}

	// set the processor to give the fastest clock frequencies for the
	// lowest voltage level.
	
	adi_pwr_SetMaxFreqForVolt( ADI_PWR_VLEV_085 );
	
}

////////////////////////////////////////////////////////////////////////////
// variables required to configure the timing specifications for the 
// Micron MT48LC32M8A2-75 memory modules
//
static ADI_EBIU_TIMING_VALUE sdram_refresh = { 											// SDRAM Refresh rate: 
												8192, 									// 8192 cycles
												{ 64, ADI_EBIU_TIMING_UNIT_MILLISEC	} 	// 64 milliseconds
};

static ADI_EBIU_SDRAM_BANK_VALUE bank_size =  {0, ADI_EBIU_SDRAM_BANK_32MB};			// 32MB 


// cast to first union member is used to avoid warning message from compiler
static ADI_EBIU_SDRAM_BANK_VALUE bank_caw = {0, (ADI_EBIU_SDRAM_BANK_SIZE)ADI_EBIU_SDRAM_BANK_COL_9BIT}; // 9 bit column addess width

static ADI_EBIU_TIME ebiu_44_nanosecs = {44, ADI_EBIU_TIMING_UNIT_NANOSEC};				// 44 nanoseconds
static ADI_EBIU_TIME ebiu_20_nanosecs = {20, ADI_EBIU_TIMING_UNIT_NANOSEC};				// 20 nanoseconds
static ADI_EBIU_TIMING_VALUE twr_min = { 												// Minimum TWR value
												1, 										// 1 cycle
												{7500, ADI_EBIU_TIMING_UNIT_PICOSEC} 	// 7.5 nanoseconds
};



#define DO_NOT_CHANGE_MMR_SETTINGS 0

/*********************************************************************

	Function:		InitSDRAM

	Description:	Initializes the EBIU module with the required SDRAM 
				    settings.

*********************************************************************/
static void InitSDRAM(void)
{
	ADI_EBIU_RESULT EBIUResult;
	
	// The following command table describes the configuration for the ADSP-BF533 EZ-KIT, 
	// which uses one Micron MT48LC16M16A2-75 (4Meg x 16 x 4 banks) memory modules to give
	// a total of 32MB.
	//
	// This is the most general specification, as the values can be set according to the 
	// datasheet of the memory modules to be configured.
	//
	
	

	/* definitions for asynch memory controller commands */

	/*  global control register fields */
	/*  clkout enable */
	ADI_EBIU_ASYNCH_CLKOUT clkout_enable = ADI_EBIU_ASYNCH_CLKOUT_ENABLE;
	/*  which banks to enable */
	ADI_EBIU_ASYNCH_BANK_ENABLE banks_enable = ADI_EBIU_ASYNCH_BANK0_1_2_3;
 
	/* bank timing parameters - specified in cycles */
	/* transition times for the four banks */
	ADI_EBIU_ASYNCH_BANK_TIMING asynch_bank_trans_time = {ADI_EBIU_BANK_ALL, { ADI_EBIU_ASYNCH_TT_4_CYCLES, { 0, ADI_EBIU_TIMING_UNIT_NANOSEC } } };
 
	/* time between Read Enable assertion to de-assertion */
	ADI_EBIU_ASYNCH_BANK_TIMING asynch_bank_read_access_time = { ADI_EBIU_BANK_ALL,  { 0xB, { 0, ADI_EBIU_TIMING_UNIT_NANOSEC } } };
 
	/* time between Write Enable  assertion to de-assertion */
	ADI_EBIU_ASYNCH_BANK_TIMING asynch_bank_write_access_time = { ADI_EBIU_BANK_ALL,  { 7, { 0, ADI_EBIU_TIMING_UNIT_NANOSEC } } };
  
	/* time from beginning of memory cycle to R/W-enable */
	ADI_EBIU_ASYNCH_BANK_TIMING asynch_bank_setup_time = { ADI_EBIU_BANK_ALL,  { ADI_EBIU_ASYNCH_ST_3_CYCLES, { 0, ADI_EBIU_TIMING_UNIT_NANOSEC } } };
   
	/* time from de-assertion  to end of memory cycle */
	ADI_EBIU_ASYNCH_BANK_TIMING asynch_bank_hold_time = {ADI_EBIU_BANK_ALL,  { ADI_EBIU_ASYNCH_HT_2_CYCLES, { 0, ADI_EBIU_TIMING_UNIT_NANOSEC } } };

	/* specify whether ARDY enabled (is used to insert extra wait states) */
	ADI_EBIU_ASYNCH_BANK_VALUE asynch_bank_ardy_enable = { ADI_EBIU_BANK_ALL, { ardy_enable: ADI_EBIU_ASYNCH_ARDY_DISABLE } };

    	
	/* specify whether ARDY is sampled low or high */	
	ADI_EBIU_ASYNCH_BANK_VALUE asynch_bank_ardy_polarity = { ADI_EBIU_BANK_ALL, { ardy_polarity: ADI_EBIU_ASYNCH_ARDY_POLARITY_LOW } };


	
	ADI_EBIU_COMMAND_PAIR ezkit_sdram[] = {	
		{ ADI_EBIU_CMD_SET_SDRAM_BANK_SIZE,		(void*)&bank_size     		},
		{ ADI_EBIU_CMD_SET_SDRAM_BANK_COL_WIDTH,(void*)&bank_caw    		}, 
		{ ADI_EBIU_CMD_SET_SDRAM_CL_THRESHOLD,	(void*)100          		},
		{ ADI_EBIU_CMD_SET_SDRAM_TRASMIN,		(void*)&ebiu_44_nanosecs   	},
		{ ADI_EBIU_CMD_SET_SDRAM_TRPMIN,		(void*)&ebiu_20_nanosecs   	},
		{ ADI_EBIU_CMD_SET_SDRAM_TRCDMIN,		(void*)&ebiu_20_nanosecs   	},
		{ ADI_EBIU_CMD_SET_SDRAM_TWRMIN,		(void*)&twr_min 	        },
		{ ADI_EBIU_CMD_SET_SDRAM_REFRESH,		(void*)&sdram_refresh 		},
		// The next command disables Fast back to back read/write sequences
		// which is safe for all systems
		{ ADI_EBIU_CMD_SET_SDRAM_FBBRW, 		(void*)0					},
		
       	/* Asynch Commands memory controller commands */ 
       	{ ADI_EBIU_CMD_SET_ASYNCH_CLKOUT_ENABLE,          (void*)&clkout_enable },
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_ENABLE,            (void*)&banks_enable },                                 
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_TRANSITION_TIME,   (void*)&asynch_bank_trans_time  },
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_READ_ACCESS_TIME,  (void*)&asynch_bank_read_access_time  }, 
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_WRITE_ACCESS_TIME, (void*)&asynch_bank_write_access_time  },
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_SETUP_TIME,        (void*)&asynch_bank_setup_time  }, 
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_HOLD_TIME,         (void*)&asynch_bank_hold_time  },
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_ARDY_ENABLE,       (void*)&asynch_bank_ardy_enable  },  
       	{ ADI_EBIU_CMD_SET_ASYNCH_BANK_ARDY_POLARITY,     (void*)&asynch_bank_ardy_polarity },  	
		{ ADI_EBIU_CMD_END, 0}
	};
	// 
	// If a Micron memory module is used. the following commands will suffice
	//		{ ADI_EBIU_CMD_SET_SDRAM_BANK_SIZE,		(void*)&bank_size                            },
	//		{ ADI_EBIU_CMD_SET_SDRAM_MODULE, 		(void*)ADI_EBIU_SDRAM_MODULE_MT48LC16M16A2_75 },
	//		{ ADI_EBIU_CMD_END, 0}
	//
	// Finally, when the BF537 EZ-KIT is to be used the above can be replaced by
	//		{ ADI_EBIU_CMD_SET_EZKIT, (void*)ADI_EBIU_EZKIT_BF533 }
	//		{ ADI_EBIU_CMD_END, 0}
	//
	// when the .
	//
	
	
	// Pass the above table to the Intialization routine
	
	EBIUResult = adi_ebiu_Init( ezkit_sdram, DO_NOT_CHANGE_MMR_SETTINGS );
	if ((EBIUResult != ADI_EBIU_RESULT_SUCCESS) && (EBIUResult != ADI_EBIU_RESULT_CALL_IGNORED)) {
		ezErrorCheck(1);
	}
}