exceptions.s

mpc564 时钟中断 时钟中断

	 .name "exceptions.s" 
	 .import counter

	.section .abs.00000100		
		b _start		; System reset exception, per crt0 file

	.section .abs.00000500		
		b external_interrupt_exception

	.text
external_interrupt_exception:
	
	.equ	PISCR, 0x2fc240	; Address of register PISCR
	    
						; Start prologue:
						; STEP 1:  SAVE "MACHINE CONTEXT"
						; STEP 2:  MAKE MSR[RI] RECOVERASBLE
; Omit steps 1, 2- new exceptions during routine are irrecoverable  

						; STEP 3: SAVE OTHER APPROPRIATE CONTEXT
	stwu	sp, -24 (sp); Create stack frame & store backchain
	stw		r3, 8 (sp)	; Save only gprs used for this exception
	stw		r4, 12 (sp)	
	stw		r5, 16 (sp)
	mfcr	r3			; Save CR
	stw		r3, 4 (sp)	; All important registers are saved for PIT

							; STEP 4: DETERMINE INTERRUPT SOURCE
	lis		r4, PISCR@ha	; Load high word of Pointer to PISCR
	lhz		r3, PISCR@l(r4)	; Load PISCR register value
	andi.	r5, r3,0x80		; Check for Interrupt status of the PIT
	beq	other_interrupt		; If status was not set, check other IRQs 

							; STEP 5: BRANCH TO INTERRUPT HANDLER
							; Perform PIT service routine right here:
	sth		r3, PISCR@l(r4)	; Negate interrupt request (write a 1)
	lis		r4, counter@ha	; Load high word of Pointer to counter
	lwz		r3, counter@l(r4)	; Load counter value to r3
	addi	r3, r3, 1			; Increment counter
	stw		r3, counter@l(r4)	; Write back counter value

							; STEP 6: RESTORE CONTEXT
Epilog:						; Start epilog:
	lwz		r3, 4 (sp)		; Restore CR
	mtcrf	0xff, r3		; Mask = 1111 1111, restoring CR fields
	lwz		r3, 8 (sp)		; Restore gprs
	lwz		r4, 12 (sp)
	lwz		r5, 16 (sp)
	addi	sp, sp, 24		; Restore SP, which frees up stack  

							; STEP 7:  RETURN TO PROGRAM 
	rfi						; End of Interrupt -- return to program

other_interrupt:			; Insert code for other interrupts
	b	Epilog				; Do the epilog of the handler