main.c

mpc564 时钟中断 时钟中断

#include "mpc555.h"

typedef struct	{ UINT8* base_pointer;
	  UINT32 Buffer_size;
	  UINT32 Current_index;
	} REC_BUF_TYPE	 ;

   UINT8 actual_buffer[100];
   REC_BUF_TYPE Rec_Buf;
   UINT32 loopctr = 0 ;		// Loop counter for main loop

void init555()				// Simple MPC555 Initialization
{
   USIU.SYPCR.R = 0xffffff03; // Disable watchdog timer 
   USIU.PLPRCR.B.MF = 0x009; // Run at 40MHz for 4MHz crystal
   while(USIU.PLPRCR.B.SPLS == 0);	// Wait for PLL to lock	
   UIMB.UMCR.B.HSPEED = 0;	// Run IMB at full clock speed				       
}

void initSci() 
{
							// STEP 1: MODULE SPECIFIC INITIALIZATION
							// Initialize the SCI for simple operation
    QSMCM.SCC1R0.B.SC1BR = 40000000/32/9600;	// Set baud rate
    QSMCM.SCC1R1.B.TE = 1;	// Transmitter enable
    QSMCM.SCC1R1.B.RE = 1;	// Receiver enable
							// Initialize buffer variables
    Rec_Buf.Current_index =0;
    Rec_Buf.Buffer_size = 100;
    Rec_Buf.base_pointer = (UINT8 *)&actual_buffer ;

							// STEP 2: LEVEL ASSIGMENT
    QSMCM.QDSCI_IL.B.ILDSCI = 5;	// define SCIIRQ at level 5

							// STEP 3: ENABLE INTERRUPT
    QSMCM.SCC1R1.B.RIE = 1;	// Enable receive interrupts only

							// STEP 4: SET APPROPRIATE SIMASK BITS
    USIU.SIMASK.R = 0x00100000; // Enable level 5; others disabled 
} 

main()
{
   init555();				// Perform a simple 555 initialzation
   initSci();				// Iniialize SCI module 
   asm(" mtspr EIE, r3");	// FINAL STEP: SET MSR[EE], MSR[RI] BITS
   while(1)					// Wait for SCI interrupts	
   {
   		loopctr++;
   }			     
}

void SCI_Int (void)
{ 
  if (QSMCM.SC1SR.B.RDRF == 1)
  { 						// Handle the receive interrupt
    Rec_Buf.base_pointer[Rec_Buf.Current_index++]= QSMCM.SC1DR.R ;
    if (Rec_Buf.Current_index == Rec_Buf.Buffer_size)
      Rec_Buf.Current_index = 0;
  }
  else
  { }						// TX interrupt not implemented.
}  

#pragma interrupt Ext_Isr
#pragma section IrqSect RX address=0x500
#pragma use_section IrqSect Ext_Isr

void Ext_Isr()
{ 
#define IRQ0 0x80000000
#define LEVEL0 0x40000000
#define IRQ1 0x20000000
#define LEVEL1 0x10000000
#define IRQ2 0x08000000
#define LEVEL2 0x04000000
#define IRQ3 0x02000000
#define LEVEL3 0x01000000
#define IRQ4 0x00800000
#define LEVEL4 0x00400000
#define IRQ5 0x00200000
#define LEVEL5 0x00100000
#define IRQ6 0x00080000
#define LEVEL6 0x00040000
#define IRQ7 0x00020000
#define LEVEL7 0x00010000

	UINT32 int_value = 0 ;		// Start with null value

	asm (" mtspr EID, r0 ");  	// Set MSR.RI - now recoverable

	int_value = USIU.SIPEND.R ;	// Get SIPEND Value
	
	while (int_value != 0)
	 {							//Loop until all ints handled
	if (int_value&IRQ0)
	 {
		int_value &= ~IRQ0 ;
	 }
	else if (int_value&LEVEL0)
	 {
		int_value &= ~LEVEL0 ;
	 }
	else if (int_value&IRQ1)
	 {
		int_value &= ~IRQ1 ;
	 }
	else if (int_value&LEVEL1)
	 {
		int_value &= ~LEVEL1 ;
	 }
	else if (int_value&IRQ2)
	 {
		int_value &= ~IRQ2 ;
	 }
	else if (int_value&LEVEL2)
	 { 
		int_value &= ~LEVEL2 ;
	 }
	else if (int_value&IRQ3)
	 {
		int_value &= ~IRQ3 ;
	 }
	else if (int_value&LEVEL3)
	 {
		int_value &= ~LEVEL3 ;
	 }
	else if (int_value&IRQ4)
	 {
		int_value &= ~IRQ4 ;
	 }
	else if (int_value&LEVEL4)
	 {
		int_value &= ~LEVEL4 ;
	 }
	else if (int_value&IRQ5)
	 {
		int_value &= ~IRQ5 ;
	 }
	else if (int_value&LEVEL5)
	 {
		SCI_Int() ;	 			// Call SCI C interrupt handler
		int_value &= ~LEVEL5 ;
	 }
	else if (int_value&IRQ6)
	 {
		int_value &= ~IRQ6 ;
	 }
	else if (int_value&LEVEL6)
	 {
		int_value &= ~LEVEL6 ;
	 }
	else if (int_value&IRQ7)
	 {
		int_value &= ~IRQ7 ;
	 }
	else if (int_value&LEVEL7)
	 {
		int_value &= ~LEVEL7 ;
	 }
	else
	 {							// ERROR STATE 
	 }
	} 						   
	asm (" mtspr NRI, r0 ");  	// Clear MSR.RI - now irrecoverable
}