📄 stk500i.lst
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(0498)
(0499) //increment (word) address only when we have an uneven (byte) address
(0500) if(i&1) address++;
0442 FEC0 SBRS R12,0
0443 C018 RJMP 0x045C
0444 E041 LDI R20,1
0445 E050 LDI R21,0
0446 E060 LDI R22,0
0447 E070 LDI R23,0
0448 9040006E LDS R4,address+2
044A 9050006F LDS R5,address+3
044C 9020006C LDS R2,address
044E 9030006D LDS R3,address+1
0450 0E24 ADD R2,R20
0451 1E35 ADC R3,R21
0452 1E46 ADC R4,R22
0453 1E57 ADC R5,R23
0454 9230006D STS address+1,R3
0456 9220006C STS address,R2
0458 9250006F STS address+3,R5
045A 9240006E STS address+2,R4
045C 01C6 MOVW R24,R12
045D 9601 ADIW R24,1
045E 016C MOVW R12,R24
045F 14CA CP R12,R10
0460 04DB CPC R13,R11
0461 F408 BCC 0x0463
0462 CF7B RJMP 0x03DE
(0501) }
(0502)
(0503) //If this page is complete the bit 7 of mode will be set and we programm the page
(0504) if(mode&0x80)
0463 FEE7 SBRS R14,7
0464 C077 RJMP 0x04DC
(0505) {
(0506) spi_transfer_8(msg_buffer[6]);
0465 9100007A LDS R16,0x7A
0467 D489 RCALL _spi_transfer_8
(0507) spi_transfer_16(start_address&0xFFFF);
0468 EF4F LDI R20,0xFF
0469 EF5F LDI R21,0xFF
046A E060 LDI R22,0
046B E070 LDI R23,0
046C 01FE MOVW R30,R28
046D 8026 LDD R2,Z+6
046E 8037 LDD R3,Z+7
046F 8440 LDD R4,Z+8
0470 8451 LDD R5,Z+9
0471 2224 AND R2,R20
0472 2235 AND R3,R21
0473 2246 AND R4,R22
0474 2257 AND R5,R23
0475 0181 MOVW R16,R2
0476 D47F RCALL _spi_transfer_16
(0508) spi_transfer_8(0);
0477 2700 CLR R16
0478 D478 RCALL _spi_transfer_8
(0509)
(0510) //If we have no valid polling address switch to simple wait mode
(0511) if(polling_address==0)
0479 E040 LDI R20,0
047A E050 LDI R21,0
047B E060 LDI R22,0
047C E070 LDI R23,0
047D 01FE MOVW R30,R28
047E 8022 LDD R2,Z+2
047F 8033 LDD R3,Z+3
0480 8044 LDD R4,Z+4
0481 8055 LDD R5,Z+5
0482 1624 CP R2,R20
0483 0635 CPC R3,R21
0484 0646 CPC R4,R22
0485 0657 CPC R5,R23
0486 F421 BNE 0x048B
(0512) {
(0513) mode = (mode&(~0x70)) | 0x10;
0487 2D8E MOV R24,R14
0488 788F ANDI R24,0x8F
0489 6180 ORI R24,0x10
048A 2EE8 MOV R14,R24
(0514) }
(0515)
(0516) //Different polling methods
(0517) //Hard waiting
(0518) if((mode&0x70) == 0x10)
048B 2D8E MOV R24,R14
048C 7780 ANDI R24,0x70
048D 3180 CPI R24,0x10
048E F429 BNE 0x0494
(0519) {
(0520) wait_ms(msg_buffer[4]);
048F 91000078 LDS R16,0x78
0491 2711 CLR R17
0492 DBC9 RCALL _wait_ms
(0521) }
0493 C048 RJMP 0x04DC
(0522) //Data polling
(0523) else if((mode&0x70) == 0x20)
0494 2D8E MOV R24,R14
0495 7780 ANDI R24,0x70
0496 3280 CPI R24,0x20
0497 F009 BEQ 0x0499
0498 C033 RJMP 0x04CC
(0524) {
(0525) do{
(0526) //If we have an uneven byte read the
(0527) //high byte
(0528) if(polling_address%2)
0499 E041 LDI R20,1
049A E050 LDI R21,0
049B E060 LDI R22,0
049C E070 LDI R23,0
049D 01FE MOVW R30,R28
049E 8022 LDD R2,Z+2
049F 8033 LDD R3,Z+3
04A0 8044 LDD R4,Z+4
04A1 8055 LDD R5,Z+5
04A2 2224 AND R2,R20
04A3 2235 AND R3,R21
04A4 2246 AND R4,R22
04A5 2257 AND R5,R23
04A6 E040 LDI R20,0
04A7 E050 LDI R21,0
04A8 E060 LDI R22,0
04A9 E070 LDI R23,0
04AA 1624 CP R2,R20
04AB 0635 CPC R3,R21
04AC 0646 CPC R4,R22
04AD 0657 CPC R5,R23
04AE F029 BEQ 0x04B4
(0529) {
(0530) spi_transfer_8(msg_buffer[7]|(1<<3));
04AF 9100007B LDS R16,0x7B
04B1 6008 ORI R16,0x8
04B2 D43E RCALL _spi_transfer_8
(0531) }
04B3 C003 RJMP 0x04B7
(0532) else
(0533) {
(0534) spi_transfer_8(msg_buffer[7]);
04B4 9100007B LDS R16,0x7B
04B6 D43A RCALL _spi_transfer_8
(0535) }
(0536) spi_transfer_16(polling_address/2);
04B7 01FE MOVW R30,R28
04B8 8022 LDD R2,Z+2
04B9 8033 LDD R3,Z+3
04BA 8044 LDD R4,Z+4
04BB 8055 LDD R5,Z+5
04BC 9456 LSR R5
04BD 9447 ROR R4
04BE 9437 ROR R3
04BF 9427 ROR R2
04C0 0181 MOVW R16,R2
04C1 D434 RCALL _spi_transfer_16
(0537) tmp=spi_transfer_8(0x00);
04C2 2700 CLR R16
04C3 D42D RCALL _spi_transfer_8
04C4 870D STD Y+13,R16
(0538) }while(tmp==msg_buffer[8]);
04C5 9020007C LDS R2,0x7C
04C7 840D LDD R0,Y+13
04C8 1402 CP R0,R2
04C9 F409 BNE 0x04CB
04CA CFCE RJMP 0x0499
(0539) }
04CB C010 RJMP 0x04DC
(0540) //RDY/BSY polling
(0541) else if((mode&0x70) == 0x40)
04CC 2D8E MOV R24,R14
04CD 7780 ANDI R24,0x70
04CE 3480 CPI R24,0x40
04CF F441 BNE 0x04D8
(0542) {
(0543) while(spi_transfer_32(0xF0000000)&1);
04D0 E000 LDI R16,0
04D1 E010 LDI R17,0
04D2 E020 LDI R18,0
04D3 EF30 LDI R19,0xF0
04D4 D42D RCALL _spi_transfer_32
04D5 FD00 SBRC R16,0
04D6 CFF9 RJMP 0x04D0
(0544) }
04D7 C004 RJMP 0x04DC
(0545) //If something was not correct with the given mode do
(0546) //hard waiting. Should never reach this point
(0547) else
(0548) {
(0549) wait_ms(msg_buffer[4]);
04D8 91000078 LDS R16,0x78
04DA 2711 CLR R17
04DB DB80 RCALL _wait_ms
(0550) }
(0551) }
(0552) }
(0553)
(0554) num_bytes = 2;
04DC E082 LDI R24,2
04DD E090 LDI R25,0
04DE 879B STD Y+11,R25
04DF 878A STD Y+10,R24
(0555) msg_buffer[0] = CMD_PROGRAM_FLASH_ISP;
04E0 E183 LDI R24,0x13
04E1 93800074 STS msg_buffer,R24
(0556) msg_buffer[1] = STATUS_CMD_OK;
04E3 2422 CLR R2
04E4 92200075 STS msg_buffer+1,R2
(0557) }
04E6 C373 RJMP 0x085A
(0558) //////////////////////////////////////
(0559) //CMD_READ_FLASH_ISP
(0560) //////////////////////////////////////
(0561) else if(cmd==CMD_READ_FLASH_ISP)
04E7 858C LDD R24,Y+12
04E8 3184 CPI R24,0x14
04E9 F009 BEQ 0x04EB
04EA C066 RJMP 0x0551
(0562) {
(0563) block_size = ((unsigned int)msg_buffer[1])<<8;
04EB 90A00075 LDS R10,msg_buffer+1
04ED 24BB CLR R11
04EE 2CBA MOV R11,R10
04EF 24AA CLR R10
(0564) block_size |= msg_buffer[2];
04F0 90200076 LDS R2,msg_buffer+2
04F2 2433 CLR R3
04F3 28A2 OR R10,R2
04F4 28B3 OR R11,R3
(0565) tmp = msg_buffer[3];
04F5 90200077 LDS R2,msg_buffer+3
04F7 862D STD Y+13,R2
(0566)
(0567) for(i=0;i<block_size;i++)
04F8 24CC CLR R12
04F9 24DD CLR R13
04FA C040 RJMP 0x053B
(0568) {
(0569) //Select Low or High-Byte
(0570) if(i&1)
04FB FEC0 SBRS R12,0
04FC C004 RJMP 0x0501
(0571) {
(0572) spi_transfer_8(tmp|(1<<3));
04FD 850D LDD R16,Y+13
04FE 6008 ORI R16,0x8
04FF D3F1 RCALL _spi_transfer_8
(0573) }
0500 C002 RJMP 0x0503
(0574) else
(0575) {
(0576) spi_transfer_8(tmp);
0501 850D LDD R16,Y+13
0502 D3EE RCALL _spi_transfer_8
(0577) }
(0578)
(0579) spi_transfer_16(address&0xFFFF);
0503 EF4F LDI R20,0xFF
0504 EF5F LDI R21,0xFF
0505 E060 LDI R22,0
0506 E070 LDI R23,0
0507 9040006E LDS R4,address+2
0509 9050006F LDS R5,address+3
050B 9020006C LDS R2,address
050D 9030006D LDS R3,address+1
050F 2224 AND R2,R20
0510 2235 AND R3,R21
0511 2246 AND R4,R22
0512 2257 AND R5,R23
0513 0181 MOVW R16,R2
0514 D3E1 RCALL _spi_transfer_16
(0580) msg_buffer[i+2] = spi_transfer_8(0);
0515 2700 CLR R16
0516 D3DA RCALL _spi_transfer_8
0517 E784 LDI R24,0x74
0518 E090 LDI R25,0
0519 01F6 MOVW R30,R12
051A 9632 ADIW R30,2
051B 0FE8 ADD R30,R24
051C 1FF9 ADC R31,R25
051D 8300 STD Z+0,R16
(0581)
(0582) //increment (word) address only when we have an uneven (byte) address
(0583) if(i&1) address++;
051E FEC0 SBRS R12,0
051F C018 RJMP 0x0538
0520 E041 LDI R20,1
0521 E050 LDI R21,0
0522 E060 LDI R22,0
0523 E070 LDI R23,0
0524 9040006E LDS R4,address+2
0526 9050006F LDS R5,address+3
0528 9020006C LDS R2,address
052A 9030006D LDS R3,address+1
052C 0E24 ADD R2,R20
052D 1E35 ADC R3,R21
052E 1E46 ADC R4,R22
052F 1E57 ADC R5,R23
0530 9230006D STS address+1,R3
0532 9220006C STS address,R2
0534 9250006F STS address+3,R5
0536 9240006E STS address+2,R4
0538 01C6 MOVW R24,R12
0539 9601 ADIW R24,1
053A 016C MOVW R12,R24
053B 14CA CP R12,R10
053C 04DB CPC R13,R11
053D F408 BCC 0x053F
053E CFBC RJMP 0x04FB
(0584) }
(0585)
(0586) num_bytes = block_size+3;
053F 01C5 MOVW R24,R10
0540 9603 ADIW R24,3
0541 879B STD Y+11,R25
0542 878A STD Y+10,R24
(0587) msg_buffer[0] = CMD_READ_FLASH_ISP;
0543 E184 LDI R24,0x14
0544 93800074 STS msg_buffer,R24
(0588) msg_buffer[1] = STATUS_CMD_OK;
0546 2422 CLR R2
0547 92200075 STS msg_buffer+1,R2
(0589) msg_buffer[block_size+2] = STATUS_CMD_OK;
0549 E784 LDI R24,0x74
054A E090 LDI R25,0
054B 01F5 MOVW R30,R10
054C 9632 ADIW R30,2
054D 0FE8 ADD R30,R24
054E 1FF9 ADC R31,R25
054F 8220 STD Z+0,R2
(0590) }
0550 C309 RJMP 0x085A
(0591) //////////////////////////////////////
(0592) //CMD_PROGRAM_EEPROM_ISP
(0593) //////////////////////////////////////
(0594) else if(cmd==CMD_PROGRAM_EEPROM_ISP)
0551 858C LDD R24,Y+12
0552 3185 CPI R24,0x15
0553 F009 BEQ 0x0555
0554 C174 RJMP 0x06C9
(0595) {
(0596) block_size = ((unsigned int)msg_buffer[1])<<8;
0555 90A00075 LDS R10,msg_buffer+1
0557 24BB CLR R11
0558 2CBA MOV R11,R10
0559 24AA CLR R10
(0597) block_size |= msg_buffer[2];
055A 90200076 LDS R2,msg_buffer+2
055C 2433 CLR R3
055D 28A2 OR R10,R2
055E 28B3 OR R11,R3
(0598) mode = msg_buffer[3];
055F 90E00077 LDS R14,msg_buffer+3
(0599)
(0600) //Byte Mode
(0601) if((mode&1) == 0)
0561 FCE0 SBRC R14,0
0562 C09B RJMP 0x05FE
(0602) {
(0603) for(i=0;i<block_size;i++)
0563 24CC CLR R12
0564 24DD CLR R13
0565 C093 RJMP 0x05F9
(0604) {
(0605) spi_transfer_8(msg_buffer[5]);
0566 91000079 LDS R16,0x79
0568 D388 RCALL _spi_transfer_8
(0606) spi_transfer_16(address&0xFFFF);
0569 EF4F LDI R20,0xFF
056A EF5F LDI R21,0xFF
056B E060 LDI R22,0
056C E070 LDI R23,0
056D 9040006E LDS R4,address+2
056F 9050006F LDS R5,address+3
0571 9020006C LDS R2,address
0573 9030006D LDS R3,address+1
0575 2224 AND R2,R20
0576 2235 AND R3,R21
0577 2246 AND R4,R22
0578 2257 AND R5,R23
0579 0181 MOVW R16,R2
057A D37B RCALL _spi_transfer_16
(0607) spi_transfer_8(msg_buffer[i+10]);
057B E784 LDI R24,0x74
057C E090 LDI R25,0
057D 01F6 MOVW R30,R12
057E 963A ADIW R30,0xA
057F 0FE8 ADD R30,R24
0580 1FF9 ADC R31,R25
0581 8100 LDD R16,Z+0
0582 D36E RCALL _spi_transfer_8
(0608)
(0609) //Check if we can do polling
(0610) if((msg_buffer[i+10]!=msg_buffer[8])&&(msg_buffer[i+10]!=msg_buffer[9]))
0583 E784 LDI R24,0x74
0584 E090 LDI R25,0
0585 01F6 MOVW R30,R12
0586 963A ADIW R30,0xA
0587 0FE8 ADD R30,R24
0588 1FF9 ADC R31,R25
0589 8020 LDD R2,Z+0
058A 2433 CLR R3
058B 9040007C LDS R4,0x7C
058D 1424 CP R2,R4
058E F0D1 BEQ 0x05A9
058F 9040007D LDS R4,0x7D
0591 1424 CP R2,R4
0592 F0B1 BEQ 0x05A9
(0611) {
(0612) polling_address = address&0xFFFF;
0593 EF4F LDI R20,0xFF
0594 EF5F LDI R21,0xFF
0595 E060 LDI R22,0
0596 E070 LDI R23,0
0597 9040006E LDS R4,address+2
0599 9050006F LDS R5,address+3
059B 9020006C LDS R2,address
059D 9030006D LDS R3,address+1
059F 2224 AND R2,R20
05A0 2235 AND R3,R21
05A1 2246 AND R4,R22
05A2 2257 AND R5,R23
05A3 01FE MOVW R30,⌨️ 快捷键说明
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