11.txt

C24x 快速傅立叶变换 (FFT) 库

            C24x 快速傅立叶变换 (FFT) 库

       
      ;*************************************************************************************
      ;*********************** SECTION 1: FFT LIBRARY 
      *********************************** 
      ;*************************************************************************************
      Thank you for trying C2000 Software Collateral. 
      FFT Library is installed in C:\TIDCS\C24\DSP_TBOX\FFT directory.
      Fast Fourier Transforms are an efficient class of algorithms for the 
      digital computation 
      of the N-point Fourier transform (DFT). In general, their input sequence 
      are assumed to 
      be complex.  In many real applications, the data sequences to be processed 
      are real valued. 
      Even though the data is real, complex-valued DFT algorithm can still be 
      used. One simple 
      approach creates a complex sequence from the real sequence; that is, real 
      data for the real 
      components and zeros for the imaginary components, The complex FFT can 
      then be =applied directly. 

      However, this method is not efficient as it consumes 2N memory locations 
      (Real & Imaginary) 
      for N point sequence. When input is purely real, their symmetric 
      properties compute DFT very 
      efficiently. One such optimized real FFT algorithm for 2N-point real data 
      sequence is packing 
      algorithm. The original 2N-point sequence is packed as N-point complex 
      sequence and N -point 
      complex FFT is performed on the complex sequence. Finally the resulting N 
      -point complex output 
      is unpacked into another N+1 point complex sequence, which corresponds to 
      spectral bin 0 to N 
      of 2N-point real input sequence. Spectral bin 0 to N is sufficient, as the 
      remaining bins N+1 
      to 2N-1 are complex conjugates of spectral bins N-1 to 1. 
      The real FFT requires 2N+2 memory locations to compute the FFT for 
      2N-point real valued sequence, 
      which is highly preferable in contrast to the complex FFT that consumes 
      4N-locations for 2N-point 
      real valued sequence. Moreover using this strategy, the complex FFT size 
      can be reduced by half, 
      at the FFT cost function of O(N) operations to pack the input and unpack 
      the output. Hence, 
      the real FFT algorithm computes the FFT of a real input sequence almost 
      twice as fast as the 
      general FFT algorithm.
      This FFT library contains 128, 256 & 512 point real/complex FFT and they 
      are summarized in the below table.

      FFT LIBRARY
      |===============|=======================================================|
      |  Module Name | Description                     |
      |===============|=======================================================| 
      | FFT128C  | 128-point complex FFT module              |
      |---------------|----------------------------------------------------------------------|
      | FFT256C  | 256-point complex FFT module            |
      |---------------|----------------------------------------------------------------------|
      | FFT512C  | 512-point complex FFT module            |
      |---------------|----------------------------------------------------------------------|
      | FFT128R  | 128-point real FFT module             |
      |---------------|----------------------------------------------------------------------|
      | FFT256R  | 256-point real FFT module            |
      |---------------|----------------------------------------------------------------------|
      | FFT512R  | 512-point real FFT module            |
      |=======================================================================|
       
      DOCUMENTATION:
      |===============|========================================================|
      |  DOC  | DIRECTORY LOCATION                    |
      |===============|========================================================| 

      |  MODULE DOC | C:\TIDCS\C24\DSP_TBOX\FFT\DOC\FFT_MDL.PDF                  
       |
      |---------------|----------------------------------------------------------------------|
      |  STB DOC | C:\TIDCS\C24\DSP_TBOX\FFT\DOC\FFT_STB.PDF                 |
      |=======================================================================|

      ;*************************************************************************************
      ;******************** SECTION 2: Software Test Bench (STB) 
      *************************** 
      ;*************************************************************************************
      To facilitate evaluation and deployment of these modules, they are made 
      available as 
      Software Test Benches (STBs) which run as code composer projects on 
      readily available 
      EVMs or eZdsp hardware platforms. 
      Each STB focuses on a particular software module and shows the customer 
      how to invoke it, 
      pass variable or data to it, and how to link it into their systems. Where 
      possible, the 
      module under evaluation is made to interact with other modules such as 
      signal generators, 
      which can provide input stimulus and data-logging modules or PWM-DAC 
      drivers to examine a 
      module's response in a real-time environment. This helps customers to get 
      a more realistic 
      feel of the software module's capability and applicability. 
      Shown below is the STB for FFT module.
                                                  IPCB                 MAG
        CH0  |--------------|                     |--|   |--------|   |--|       
                    |------|
        ---->|              |                |--|-->|        |   |--|  
      |----------------->|Graph1|     
        CH0  |              |         |--------|  |--|<--|FFTcalc |   |--|  |    
                    |------|
        ---->|            |xn=CH0   |  |  |--|   |        |   |--|  |       
        CH0  |   ADC04U_DRV |----|--->|FFTCACQ |->|--|   |--------|   |--|--|  
      |-----------|
        ---->|              |    |    |    |  |--|   |        |   |--|     |     
            |   |------|
        CH0  |              |    |    |--------|  |--|-->|FFTmag  |-->|--|  |->| 
       DATALOG  |-->|Graph2|
        --|->|              |    |           |--|   |        |   |--|  |  |      
           |   |------|
             |--------------|    |           |--|   |--------|   |--|  |  
      |-----------|
                                 |                                          |
                                 |------------------------------------------|
       
      The idea behind the STB strategy to demonstrate the FFT module is indeed 
      simple. A
      block of N data sample is sampled/acquired using ADC (20Khz Sampling 
      frequency) and
      then processed by the N-pint Real or Complex FFT module to determine the 
      spectral
      content. Magnitude-square of all the spectral bins are updated along with 
      input signal on
      the CCS graph window using Real Time Monitor for observation. User can 
      quickly start
      evaluating the FFT modules by sweeping the input frequency and observing 
      the spectral
      response.
       

      Version History:
      ================
      Version 1.0a dated 26th Feb 2004
      ================================
      1. AR0, AR6 and AR7 register are not being saved properly in the real FFT 
      split functions