cop2000.edf

cop2000试验仪的模拟器

(edif  COP2000
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap
    (keywordLevel 0)
  )
  (status
    (written
      (timeStamp 2004 12 15 12 46 44)
      (program "UNKNOWN"
	(version "3.6.1.6817")
      )
      (author "Administrator")
    )
  )
  (external VIRTEX
    (edifLevel 0)
    (technology
      (numberDefinition)
    )
    (cell BUFGP
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port I
	    (direction INPUT)
	  )
	)
      )
    )
    (cell FDC
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port Q
	    (direction OUTPUT)
	  )
	  (port D
	    (direction INPUT)
	  )
	  (port C
	    (direction INPUT)
	  )
	  (port CLR
	    (direction INPUT)
	  )
	)
      )
    )
    (cell FDCE
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port Q
	    (direction OUTPUT)
	  )
	  (port D
	    (direction INPUT)
	  )
	  (port C
	    (direction INPUT)
	  )
	  (port CLR
	    (direction INPUT)
	  )
	  (port CE
	    (direction INPUT)
	  )
	)
      )
    )
    (cell GND
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port G
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell IBUF
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port I
	    (direction INPUT)
	  )
	)
      )
    )
    (cell IOBUF_S_12
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port IO
	    (direction INOUT)
	  )
	  (port I
	    (direction INPUT)
	  )
	  (port T
	    (direction INPUT)
	  )
	)
      )
    )
    (cell LUT1
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port I0
	    (direction INPUT)
	  )
	  (port O
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell LUT2
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port I0
	    (direction INPUT)
	  )
	  (port I1
	    (direction INPUT)
	  )
	  (port O
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell LUT3
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port I0
	    (direction INPUT)
	  )
	  (port I1
	    (direction INPUT)
	  )
	  (port I2
	    (direction INPUT)
	  )
	  (port O
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell LUT4
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port I0
	    (direction INPUT)
	  )
	  (port I1
	    (direction INPUT)
	  )
	  (port I2
	    (direction INPUT)
	  )
	  (port I3
	    (direction INPUT)
	  )
	  (port O
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell MUXCY_L
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port LO
	    (direction OUTPUT)
	  )
	  (port S
	    (direction INPUT)
	  )
	  (port DI
	    (direction INPUT)
	  )
	  (port CI
	    (direction INPUT)
	  )
	)
      )
    )
    (cell MUXF5
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port S
	    (direction INPUT)
	  )
	  (port I1
	    (direction INPUT)
	  )
	  (port I0
	    (direction INPUT)
	  )
	)
      )
    )
    (cell MUXF6
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port S
	    (direction INPUT)
	  )
	  (port I1
	    (direction INPUT)
	  )
	  (port I0
	    (direction INPUT)
	  )
	)
      )
    )
    (cell OBUF_S_12
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port I
	    (direction INPUT)
	  )
	)
      )
    )
    (cell VCC
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port P
	    (direction OUTPUT)
	  )
	)
      )
    )
    (cell XORCY
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port O
	    (direction OUTPUT)
	  )
	  (port LI
	    (direction INPUT)
	  )
	  (port CI
	    (direction INPUT)
	  )
	)
      )
    )
  )
  (library DESIGNS
    (edifLevel 0)
    (technology
      (numberDefinition)
    )
    (cell COP2000
      (cellType GENERIC)
      (view Netlist_representation
	(viewType NETLIST)
	(interface
	  (port PXWR
	    (direction OUTPUT)
	  )
	  (port PXRD
	    (direction OUTPUT)
	  )
	  (port PRST
	    (direction OUTPUT)
	  )
	  (port clk
	    (direction INPUT)
	  )
	  (port rst
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_15 "keyin<15>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_14 "keyin<14>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_13 "keyin<13>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_12 "keyin<12>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_11 "keyin<11>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_10 "keyin<10>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_9 "keyin<9>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_8 "keyin<8>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_7 "keyin<7>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_6 "keyin<6>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_5 "keyin<5>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_4 "keyin<4>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_3 "keyin<3>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_2 "keyin<2>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_1 "keyin<1>")
	    (direction INPUT)
	  )
	  (port
	    (rename keyin_0 "keyin<0>")
	    (direction INPUT)
	  )
	  (port
	    (rename portout_15 "portout<15>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_14 "portout<14>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_13 "portout<13>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_12 "portout<12>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_11 "portout<11>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_10 "portout<10>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_9 "portout<9>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_8 "portout<8>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_7 "portout<7>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_6 "portout<6>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_5 "portout<5>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_4 "portout<4>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_3 "portout<3>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_2 "portout<2>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_1 "portout<1>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename portout_0 "portout<0>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_d_15 "mem_d<15>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_14 "mem_d<14>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_13 "mem_d<13>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_12 "mem_d<12>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_11 "mem_d<11>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_10 "mem_d<10>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_9 "mem_d<9>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_8 "mem_d<8>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_7 "mem_d<7>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_6 "mem_d<6>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_5 "mem_d<5>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_4 "mem_d<4>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_3 "mem_d<3>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_2 "mem_d<2>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_1 "mem_d<1>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_d_0 "mem_d<0>")
	    (direction INOUT)
	  )
	  (port
	    (rename mem_a_15 "mem_a<15>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_14 "mem_a<14>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_13 "mem_a<13>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_12 "mem_a<12>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_11 "mem_a<11>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_10 "mem_a<10>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_9 "mem_a<9>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_8 "mem_a<8>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_7 "mem_a<7>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_6 "mem_a<6>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_5 "mem_a<5>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_4 "mem_a<4>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_3 "mem_a<3>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_2 "mem_a<2>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_1 "mem_a<1>")
	    (direction OUTPUT)
	  )
	  (port
	    (rename mem_a_0 "mem_a<0>")
	    (direction OUTPUT)
	  )
	  (port mem_rd
	    (direction OUTPUT)
	  )
	  (port mem_wr
	    (direction OUTPUT)
	  )
	  (port mem_bh
	    (direction OUTPUT)
	  )
	  (port mem_bl
	    (direction OUTPUT)
	  )
	  (port mem_cs
	    (direction OUTPUT)
	  )
	  (port i_req
	    (direction INPUT)
	  )
	)
	(contents
	  (instance
	    (rename C3946_C4_C0 "C3946/C4/C0")
	    (viewRef Netlist_representation
	      (cellRef LUT3
		(libraryRef VIRTEX)
	      )
	    )
	    (property lut_function
	      (string "(I0 I1 I2 + I0' I1' I2 + I0' I1 I2' + I0 I1' I2')")
	    )
	    (property INIT
	      (string "96")
	    )
	    (property EQN
	      (string "(I0 * I1 * I2 + ~I0 * ~I1 * I2 + ~I0 * I1 * ~I2 + I0 * ~I1 * ~I2)")
	    )
	  )
	  (instance
	    (rename C3946_C4_C1 "C3946/C4/C1")
	    (viewRef Netlist_representation
	      (cellRef XORCY
		(libraryRef VIRTEX)
	      )
	    )
	  )
	  (instance
	    (rename C3946_C4_C2 "C3946/C4/C2")
	    (viewRef Netlist_representation
	      (cellRef MUXCY_L
		(libraryRef VIRTEX)
	      )
	    )
	  )
	  (instance
	    (rename C3946_C5_C0 "C3946/C5/C0")
	    (viewRef Netlist_representation
	      (cellRef LUT3
		(libraryRef VIRTEX)
	      )
	    )
	    (property lut_function
	      (string "(I0 I1 I2 + I0' I1' I2 + I0' I1 I2' + I0 I1' I2')")
	    )
	    (property INIT
	      (string "96")
	    )
	    (property EQN
	      (string "(I0 * I1 * I2 + ~I0 * ~I1 * I2 + ~I0 * I1 * ~I2 + I0 * ~I1 * ~I2)")
	    )
	  )
	  (instance
	    (rename C3946_C5_C1 "C3946/C5/C1")