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📄 x86_emit.h

📁 psp上的GBA模拟器
💻 H
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  {                                                                           \    x86_emit_opcode_1b_ext_reg(sub_rm_imm, dest);                             \    x86_emit_dword(imm);                                                      \  }                                                                           \#define x86_emit_and_reg_imm(dest, imm)                                       \  x86_emit_opcode_1b_ext_reg(and_rm_imm, dest);                               \  x86_emit_dword(imm)                                                         \#define x86_emit_xor_reg_imm(dest, imm)                                       \  x86_emit_opcode_1b_ext_reg(xor_rm_imm, dest);                               \  x86_emit_dword(imm)                                                         \#define x86_emit_test_reg_imm(dest, imm)                                      \  x86_emit_opcode_1b_ext_reg(test_rm_imm, dest);                              \  x86_emit_dword(imm)                                                         \#define x86_emit_cmp_reg_reg(dest, source)                                    \  x86_emit_opcode_1b_reg(cmp_reg_rm, dest, source)                            \#define x86_emit_test_reg_reg(dest, source)                                   \  x86_emit_opcode_1b_reg(test_reg_rm, dest, source)                           \#define x86_emit_cmp_reg_imm(dest, imm)                                       \  x86_emit_opcode_1b_ext_reg(cmp_rm_imm, dest);                               \  x86_emit_dword(imm)                                                         \#define x86_emit_mul_eax_reg(source)                                          \  x86_emit_opcode_1b_ext_reg(mul_eax_rm, source)                              \#define x86_emit_imul_eax_reg(source)                                         \  x86_emit_opcode_1b_ext_reg(imul_eax_rm, source)                             \#define x86_emit_idiv_eax_reg(source)                                         \  x86_emit_opcode_1b_ext_reg(idiv_eax_rm, source)                             \#define x86_emit_push_mem(base, offset)                                       \  x86_emit_opcode_1b_mem(push_rm, 0x06, base, offset)                         \#define x86_emit_push_imm(imm)                                                \  x86_emit_byte(x86_opcode_push_imm);                                         \  x86_emit_dword(imm)                                                         \#define x86_emit_call_offset(relative_offset)                                 \  x86_emit_byte(x86_opcode_call_offset);                                      \  x86_emit_dword(relative_offset)                                             \#define x86_emit_ret()                                                        \  x86_emit_byte(x86_opcode_ret)                                               \#define x86_emit_lea_reg_mem(dest, base, offset)                              \  x86_emit_opcode_1b_mem(lea_reg_rm, dest, base, offset)                      \#define x86_emit_j_filler(condition_code, writeback_location)                 \  x86_emit_byte(x86_opcode_ext);                                              \  x86_emit_byte(x86_opcode_j | condition_code);                               \  (writeback_location) = translation_ptr;                                     \  translation_ptr += 4                                                        \#define x86_emit_j_offset(condition_code, offset)                             \  x86_emit_byte(x86_opcode_ext);                                              \  x86_emit_byte(x86_opcode_j | condition_code);                               \  x86_emit_dword(offset)                                                      \#define x86_emit_jmp_filler(writeback_location)                               \  x86_emit_byte(x86_opcode_jmp);                                              \  (writeback_location) = translation_ptr;                                     \  translation_ptr += 4                                                        \#define x86_emit_jmp_offset(offset)                                           \  x86_emit_byte(x86_opcode_jmp);                                              \  x86_emit_dword(offset)                                                      \#define x86_emit_jmp_reg(source)                                              \  x86_emit_opcode_1b_ext_reg(jmp_reg, source)                                 \#define reg_base    ebx#define reg_cycles  edi#define reg_a0      eax#define reg_a1      edx#define reg_a2      ecx#define reg_rv      eax#define reg_s0      esi#define generate_load_reg(ireg, reg_index)                                    \  x86_emit_mov_reg_mem(reg_##ireg, reg_base, reg_index * 4);                  \#define generate_load_pc(ireg, new_pc)                                        \  x86_emit_mov_reg_imm(reg_##ireg, new_pc)                                    \#define generate_load_imm(ireg, imm)                                          \  x86_emit_mov_reg_imm(reg_##ireg, imm)                                       \#define generate_store_reg(ireg, reg_index)                                   \  x86_emit_mov_mem_reg(reg_##ireg, reg_base, reg_index * 4)                   \#define generate_shift_left(ireg, imm)                                        \  x86_emit_shl_reg_imm(reg_##ireg, imm)                                       \#define generate_shift_right(ireg, imm)                                       \  x86_emit_shr_reg_imm(reg_##ireg, imm)                                       \#define generate_shift_right_arithmetic(ireg, imm)                            \  x86_emit_sar_reg_imm(reg_##ireg, imm)                                       \#define generate_rotate_right(ireg, imm)                                      \  x86_emit_ror_reg_imm(reg_##ireg, imm)                                       \#define generate_add(ireg_dest, ireg_src)                                     \  x86_emit_add_reg_reg(reg_##ireg_dest, reg_##ireg_src)                       \#define generate_sub(ireg_dest, ireg_src)                                     \  x86_emit_sub_reg_reg(reg_##ireg_dest, reg_##ireg_src)                       \#define generate_or(ireg_dest, ireg_src)                                      \  x86_emit_or_reg_reg(reg_##ireg_dest, reg_##ireg_src)                        \#define generate_xor(ireg_dest, ireg_src)                                     \  x86_emit_xor_reg_reg(reg_##ireg_dest, reg_##ireg_src)                       \#define generate_add_imm(ireg, imm)                                           \  x86_emit_add_reg_imm(reg_##ireg, imm)                                       \#define generate_sub_imm(ireg, imm)                                           \  x86_emit_sub_reg_imm(reg_##ireg, imm)                                       \#define generate_xor_imm(ireg, imm)                                           \  x86_emit_xor_reg_imm(reg_##ireg, imm)                                       \#define generate_add_reg_reg_imm(ireg_dest, ireg_src, imm)                    \  x86_emit_lea_reg_mem(reg_##ireg_dest, reg_##ireg_src, imm)                  \#define generate_and_imm(ireg, imm)                                           \  x86_emit_and_reg_imm(reg_##ireg, imm)                                       \#define generate_mov(ireg_dest, ireg_src)                                     \  x86_emit_mov_reg_reg(reg_##ireg_dest, reg_##ireg_src)                       \#define generate_multiply(ireg)                                               \  x86_emit_imul_eax_reg(reg_##ireg)                                           \#define generate_multiply_s64(ireg)                                           \  x86_emit_imul_eax_reg(reg_##ireg)                                           \#define generate_multiply_u64(ireg)                                           \  x86_emit_mul_eax_reg(reg_##ireg)                                            \#define generate_multiply_s64_add(ireg_src, ireg_lo, ireg_hi)                 \  x86_emit_imul_eax_reg(reg_##ireg_src);                                      \  x86_emit_add_reg_reg(reg_a0, reg_##ireg_lo);                                \  x86_emit_adc_reg_reg(reg_a1, reg_##ireg_hi)                                 \#define generate_multiply_u64_add(ireg_src, ireg_lo, ireg_hi)                 \  x86_emit_mul_eax_reg(reg_##ireg_src);                                       \  x86_emit_add_reg_reg(reg_a0, reg_##ireg_lo);                                \  x86_emit_adc_reg_reg(reg_a1, reg_##ireg_hi)                                 \#define generate_function_call(function_location)                             \  x86_emit_call_offset(x86_relative_offset(translation_ptr,                   \   function_location, 4));                                                    \#define generate_exit_block()                                                 \  x86_emit_ret();                                                             \#define generate_branch_filler_true(ireg_dest, ireg_src, writeback_location)  \  x86_emit_test_reg_imm(reg_##ireg_dest, 1);                                  \  x86_emit_j_filler(x86_condition_code_z, writeback_location)                 \#define generate_branch_filler_false(ireg_dest, ireg_src, writeback_location) \  x86_emit_test_reg_imm(reg_##ireg_dest, 1);                                  \  x86_emit_j_filler(x86_condition_code_nz, writeback_location)                \#define generate_branch_filler_equal(ireg_dest, ireg_src, writeback_location) \  x86_emit_cmp_reg_reg(reg_##ireg_dest, reg_##ireg_src);                      \  x86_emit_j_filler(x86_condition_code_nz, writeback_location)                \#define generate_branch_filler_not_equal(ireg_dest, ireg_src,                 \ writeback_location)                                                          \  x86_emit_cmp_reg_reg(reg_##ireg_dest, reg_##ireg_src);                      \  x86_emit_j_filler(x86_condition_code_z, writeback_location)                 \#define generate_update_pc(new_pc)                                            \  x86_emit_mov_reg_imm(eax, new_pc)                                           \#define generate_cycle_update()                                               \  x86_emit_sub_reg_imm(reg_cycles, cycle_count);                              \  cycle_count = 0                                                             \#define generate_branch_patch_conditional(dest, offset)                       \  *((u32 *)(dest)) = x86_relative_offset(dest, offset, 4)                     \#define generate_branch_patch_unconditional(dest, offset)                     \  *((u32 *)(dest)) = x86_relative_offset(dest, offset, 4)                     \#define generate_branch_no_cycle_update(writeback_location, new_pc)           \  if(pc == idle_loop_target_pc)                                               \  {                                                                           \    x86_emit_mov_reg_imm(eax, new_pc);                                        \    generate_function_call(x86_update_gba);                                   \    x86_emit_jmp_filler(writeback_location);                                  \  }                                                                           \  else                                                                        \  {                                                                           \    x86_emit_test_reg_reg(reg_cycles, reg_cycles);                            \    x86_emit_j_offset(x86_condition_code_ns, 10);                             \    x86_emit_mov_reg_imm(eax, new_pc);                                        \    generate_function_call(x86_update_gba);                                   \    x86_emit_jmp_filler(writeback_location);                                  \  }                                                                           \#define generate_branch_cycle_update(writeback_location, new_pc)              \  generate_cycle_update();                                                    \  generate_branch_no_cycle_update(writeback_location, new_pc)                 \#define generate_conditional_branch(ireg_a, ireg_b, type, writeback_location) \  generate_branch_filler_##type(ireg_a, ireg_b, writeback_location)           \// a0 holds the destination#define generate_indirect_branch_cycle_update(type)                           \  /*generate_cycle_update();                                                  \  x86_emit_j_offset(x86_condition_code_ns, 5);                                \  generate_function_call(x86_update_gba);*/                                     \  x86_emit_jmp_offset(x86_relative_offset(translation_ptr,                    \   x86_indirect_branch_##type, 4))                                            \#define generate_indirect_branch_no_cycle_update(type)                        \  /*x86_emit_test_reg_reg(reg_cycles, reg_cycles);                              \  x86_emit_j_offset(x86_condition_code_ns, 5);                                \  generate_function_call(x86_update_gba);*/                                     \  x86_emit_jmp_offset(x86_relative_offset(translation_ptr,                    \

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