📄 x86_stub.s
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jnz ext_store_u8 # if above perform an extended write shr $15, %ecx # ecx = page number of address # load the corresponding memory map offset mov _memory_map_write(, %ecx, 4), %ecx test %ecx, %ecx # see if it's NULL jz ext_store_u8 # if so perform an extended write and $0x7FFF, %eax # isolate the lower 15bits of the address mov %dl, (%eax, %ecx) # store the value # check for self-modifying code testb $0xFF, -32768(%eax, %ecx) jne smc_write ret # return_execute_store_u16: mov %ecx, REG_PC(%ebx) # write out the PC and $~0x01, %eax # fix alignment mov %eax, %ecx # ecx = address test $0xF0000000, %ecx # check address range jnz ext_store_u16 # if above perform an extended write shr $15, %ecx # ecx = page number of address # load the corresponding memory map offset mov _memory_map_write(, %ecx, 4), %ecx test %ecx, %ecx # see if it's NULL jz ext_store_u16 # if so perform an extended write and $0x7FFF, %eax # isolate the lower 15bits of the address mov %dx, (%eax, %ecx) # store the value # check for self-modifying code testw $0xFFFF, -32768(%eax, %ecx) jne smc_write ret # return# 16bit ext memory routinesext_store_io16: and $0x3FF, %eax # wrap around address and $0xFFFF, %edx call _write_io_register16 # perform 16bit I/O register write jmp write_epilogue # see if it requires any system updateext_store_palette16: and $0x3FF, %eax # wrap around addressext_store_palette16b: # entry point for 8bit write mov %dx, _palette_ram(%eax) # write out palette value mov %edx, %ecx # cx = dx shl $11, %ecx # cx <<= 11 (red component is in high bits) mov %dh, %cl # bottom bits of cx = top bits of dx shr $2, %cl # move the blue component to the bottom of cl and $0x03E0, %dx # isolate green component of dx shl $1, %dx # make green component 6bits or %edx, %ecx # combine green component into ecx # write out the freshly converted palette value mov %cx, _palette_ram_converted(%eax) ret # doneext_store_vram16: and $0x1FFFF, %eax # wrap around address cmp $0x18000, %eax # see if address is in upper region jb ext_store_vram16b sub $0x8000, %eax # if so wrap downext_store_vram16b: mov %dx, _vram(%eax) # perform 16bit store retext_store_oam16: movl $1, _oam_update # flag OAM update and $0x3FF, %eax # wrap around address mov %dx, _oam_ram(%eax) # perform 16bit store retext_store_rtc: and $0xFFFF, %edx # make value 16bit and $0xFF, %eax # mask address jmp _write_rtc # write out RTC registerext_store_u16_jtable: .long ext_store_ignore # 0x00 BIOS, ignore .long ext_store_ignore # 0x01 invalid, ignore .long ext_store_ignore # 0x02 EWRAM, should have been hit already .long ext_store_ignore # 0x03 IWRAM, should have been hit already .long ext_store_io16 # 0x04 I/O registers .long ext_store_palette16 # 0x05 Palette RAM .long ext_store_vram16 # 0x06 VRAM .long ext_store_oam16 # 0x07 OAM RAM .long ext_store_rtc # 0x08 gamepak or RTC .long ext_store_ignore # 0x09 gamepak, ignore .long ext_store_ignore # 0x0A gamepak, ignore .long ext_store_ignore # 0x0B gamepak, ignore .long ext_store_ignore # 0x0C gamepak, ignore .long ext_store_eeprom # 0x0D EEPROM (possibly) .long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bitext_store_u16: mov %eax, %ecx # ecx = address shr $24, %ecx # ecx = address >> 24 cmp $15, %ecx ja ext_store_ignore # ecx = ext_store_u16_jtable[address >> 24] mov ext_store_u16_jtable(, %ecx, 4), %ecx jmp *%ecx # jump to table index_execute_store_u32: mov %ecx, REG_PC(%ebx) # write out the PC and $~0x03, %eax # fix alignment mov %eax, %ecx # ecx = address test $0xF0000000, %ecx # check address range jnz ext_store_u32 # if above perform an extended write shr $15, %ecx # ecx = page number of address # load the corresponding memory map offset mov _memory_map_write(, %ecx, 4), %ecx test %ecx, %ecx # see if it's NULL jz ext_store_u32 # if so perform an extended write and $0x7FFF, %eax # isolate the lower 15bits of the address mov %edx, (%eax, %ecx) # store the value # check for self-modifying code testl $0xFFFFFFFF, -32768(%eax, %ecx) jne smc_write ret # return it# 32bit ext memory routinesext_store_io32: and $0x3FF, %eax # wrap around address call _write_io_register32 # perform 32bit I/O register write jmp write_epilogue # see if it requires any system updateext_store_palette32: and $0x3FF, %eax # wrap around address call ext_store_palette16b # write first 16bits add $2, %eax # go to next address shr $16, %edx # go to next 16bits jmp ext_store_palette16b # write next 16bitsext_store_vram32: and $0x1FFFF, %eax # wrap around address cmp $0x18000, %eax # see if address is in upper region jb ext_store_vram32b sub $0x8000, %eax # if so wrap downext_store_vram32b: mov %edx, _vram(%eax) # perform 32bit store retext_store_oam32: movl $1, _oam_update # flag OAM update and $0x3FF, %eax # wrap around address mov %edx, _oam_ram(%eax) # perform 32bit store retext_store_u32_jtable: .long ext_store_ignore # 0x00 BIOS, ignore .long ext_store_ignore # 0x01 invalid, ignore .long ext_store_ignore # 0x02 EWRAM, should have been hit already .long ext_store_ignore # 0x03 IWRAM, should have been hit already .long ext_store_io32 # 0x04 I/O registers .long ext_store_palette32 # 0x05 Palette RAM .long ext_store_vram32 # 0x06 VRAM .long ext_store_oam32 # 0x07 OAM RAM .long ext_store_ignore # 0x08 gamepak, ignore (no RTC in 32bit) .long ext_store_ignore # 0x09 gamepak, ignore .long ext_store_ignore # 0x0A gamepak, ignore .long ext_store_ignore # 0x0B gamepak, ignore .long ext_store_ignore # 0x0C gamepak, ignore .long ext_store_eeprom # 0x0D EEPROM (possibly) .long ext_store_ignore # 0x0E Flash ROM/SRAM must be 8bitext_store_u32: mov %eax, %ecx # ecx = address shr $24, %ecx # ecx = address >> 24 cmp $15, %ecx ja ext_store_ignore # ecx = ext_store_u32_jtable[address >> 24] mov ext_store_u32_jtable(, %ecx, 4), %ecx jmp *%ecx# %eax = new_cpsr# %edx = store_mask_execute_store_cpsr: mov %edx, REG_SAVE(%ebx) # write out store_mask mov %ecx, REG_SAVE2(%ebx) # write out PC too mov %eax, %ecx # ecx = new_cpsr and %edx, %ecx # ecx = new_cpsr & store_mask mov REG_CPSR(%ebx), %eax # eax = cpsr not %edx # edx = ~store_mask and %edx, %eax # eax = cpsr & ~store_mask or %ecx, %eax # eax = new cpsr combined with old extract_flags # extract flags call _execute_store_cpsr_body # do the dirty work in this C function cmp $0, %eax # see if return value is 0 jnz changed_pc_cpsr # might have changed the PC ret # returnchanged_pc_cpsr: add $4, %esp # get rid of current return address call _block_lookup_address_arm # lookup new PC jmp *%eaxsmc_write: call _flush_translation_cache_ramlookup_pc: add $4, %esp movl $0, CHANGED_PC_STATUS(%ebx) mov REG_PC(%ebx), %eax testl $0x20, REG_CPSR(%ebx) jz lookup_pc_armlookup_pc_thumb: call _block_lookup_address_thumb jmp *%eaxlookup_pc_arm: call _block_lookup_address_arm jmp *%eax# eax: cycle counter_execute_arm_translate: movl $_reg, %ebx # load base register extract_flags # load flag variables movl %eax, %edi # load edi cycle counter movl REG_PC(%ebx), %eax # load PC call _block_lookup_address_arm jmp *%eax # jump to it_step_debug_x86: collapse_flags# mov $100, %edi mov %edi, %edx jmp _step_debug.comm _memory_map_read 0x8000.comm _memory_map_write 0x8000.comm _reg 0x100
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