mips_stub.s

psp上的GBA模拟器

  save_registers                  # save the registers

  jal \function                   # store value out
  andi $4, $4, \mask              # mask address

  restore_registers               # restore the other registers

  lw $ra, REG_SAVE($16)           # restore return address
  jr $ra                          # return
  nop
.endm



.macro load_u8 base
  jr $ra                          # return
  lbu $2, %lo(\base)($2)          # return base[offset]
.endm

.macro load_s8 base
  jr $ra                          # return
  lb $2, %lo(\base)($2)           # return base[offset]
.endm

.macro load_u16 base
  jr $ra                          # return
  lhu $2, %lo(\base)($2)          # return base[offset]
.endm

.macro load_s16 base
  jr $ra                          # return
  lh $2, %lo(\base)($2)           # return base[offset]
.endm

.macro load_u32 base
  jr $ra                          # return
  lw $2, %lo(\base)($2)           # return base[offset]
.endm


# 16bit unaligned load will always have a 1 in the LSB;
# should have already been taken care of in indexing.

.macro load_u16_unaligned base
  lhu $2, %lo(\base)($2)          # load base[offset]
  jr $ra                          # return
  ror $2, $2, 8                   # rotate value by 8bits
.endm

# This is technically the same as load_s8, but kept to
# avoid confusion.

.macro load_s16_unaligned base
  jr $ra                          # return
  lb $2, %lo(\base)($2)           # return base[offset]
.endm

# Unalignment must be known statically (use the tables to
# patch correctly)

.macro load_u32_unaligned base, alignment
  lw $2, %lo(\base)($2)           # load base[offset]
  jr $ra                          # return
  ror $2, $2, (\alignment * 8)    # rotate value by 8bits
.endm


.macro store_u8 base
  jr $ra                          # return
  sb $5, %lo(\base)($2)           # store value at base[offset]
.endm

.macro store_u16 base
  jr $ra                          # return
  sh $5, %lo(\base)($2)           # store value at base[offset]
.endm

.macro store_u32 base
  jr $ra                          # return
  sw $5, %lo(\base)($2)           # store value at base[offset]
.endm


# Store the value double mirrored (u16)

.macro store_u8_double base
  ins $5, $5, 8, 8                # value = (value << 8) | value
  jr $ra                          # return
  sh $5, %lo(\base)($2)           # store value at base[offset]
.endm


# Store the values and check if it overwrote code there

.macro store_u8_smc base
  addiu $2, $2, %lo(\base)        # offset the address
  lb $1, -32768($2)               # load the SMC status
  bne $1, $0, smc_write           # is there code there?
  sb $5, ($2)                     # store value at base[offset] (delay)
  jr $ra                          # return
  nop
.endm

.macro store_u16_smc base
  addiu $2, $2, %lo(\base)        # offset the address
  lh $1, -32768($2)               # load the SMC status
  bne $1, $0, smc_write           # is there code there?
  sh $5, ($2)                     # store value at base[offset] (delay)
  jr $ra                          # return
  nop
.endm

.macro store_u32_smc base
  addiu $2, $2, %lo(\base)        # offset the address
  lw $1, -32768($2)               # load the SMC status
  bne $1, $0, smc_write           # is there code there?
  sw $5, ($2)                     # store value at base[offset] (delay)
  jr $ra                          # return
  nop
.endm



# Unsigned 8bit load handlers

execute_load_bios_u8:
  region_check 0, patch_load_u8
  srl $2, $5, 14                  # check if PC is in BIOS region
  bne $2, $0, 1f                  # if not, perform BIOS protected read
  lui $1, %hi(bios_rom)           # generate upper address (delay)

  andi $4, $4, 0x3FFF             # generate offset
  addu $2, $1, $4
  load_u8 bios_rom

1:
  lui $2, %hi(bios_read_protect)  # generate upper address
  ins $2, $4, 0, 2                # lower 2 bits address contributes
  load_u8 bios_read_protect

execute_load_ewram_u8:
  translate_region_ewram patch_load_u8
  load_u8 (ewram + 0x8000)

# Put the generic address over the handler you want to be default
# IWRAM is typically the most frequently read and written to.

execute_load_u8:
execute_load_iwram_u8:
  translate_region 3, patch_load_u8, (iwram + 0x8000), 0x7FFF
  load_u8 (iwram + 0x8000)

execute_load_io_u8:
  translate_region 4, patch_load_u8, io_registers, 0x3FF
  load_u8 io_registers

execute_load_palette_u8:
  translate_region 5, patch_load_u8, palette_ram, 0x3FF
  load_u8 palette_ram

execute_load_vram_u8:
  translate_region_vram patch_load_u8
  load_u8 vram

execute_load_oam_u8:
  translate_region 7, patch_load_u8, oam_ram, 0x3FF
  load_u8 oam_ram

execute_load_gamepak8_u8:
  translate_region_gamepak 8, patch_load_u8
  load_u8 0

execute_load_gamepak9_u8:
  translate_region_gamepak 9, patch_load_u8
  load_u8 0

execute_load_gamepakA_u8:
  translate_region_gamepak 10, patch_load_u8
  load_u8 0

execute_load_gamepakB_u8:
  translate_region_gamepak 11, patch_load_u8
  load_u8 0

execute_load_gamepakC_u8:
  translate_region_gamepak 12, patch_load_u8
  load_u8 0

execute_load_eeprom_u8:
  eeprom_load patch_load_u8

execute_load_backup_u8:
  backup_load patch_load_u8
  nop

execute_load_open_u8:
  open_load8 patch_load_u8
  nop

load_u8_ftable:
  .long execute_load_bios_u8      # 0x00 BIOS
  .long execute_load_open_u8      # 0x01 open address
  .long execute_load_ewram_u8     # 0x02 EWRAM
  .long execute_load_iwram_u8     # 0x03 IWRAM
  .long execute_load_io_u8        # 0x04 I/O registers
  .long execute_load_palette_u8   # 0x05 Palette RAM
  .long execute_load_vram_u8      # 0x06 VRAM
  .long execute_load_oam_u8       # 0x07 OAM RAM
  .long execute_load_gamepak8_u8  # 0x08 gamepak
  .long execute_load_gamepak9_u8  # 0x09 gamepak
  .long execute_load_gamepakA_u8  # 0x0A gamepak
  .long execute_load_gamepakB_u8  # 0x0B gamepak
  .long execute_load_gamepakC_u8  # 0x0C gamepak
  .long execute_load_eeprom_u8    # 0x0D gamepak/eeprom
  .long execute_load_backup_u8    # 0x0E Flash ROM/SRAM
  .long execute_load_open_u8      # 0x0F open address

patch_load_u8:
  patch_handler load_u8_ftable, 0x01



# Signed 8bit load handlers

execute_load_bios_s8:
  region_check 0, patch_load_s8
  srl $2, $5, 14                  # check if PC is in BIOS region
  bne $2, $0, 1f                  # if not, perform BIOS protected read
  lui $1, %hi(bios_rom)           # generate upper address (delay)

  andi $4, $4, 0x3FFF             # generate offset
  addu $2, $1, $4
  load_s8 bios_rom

1:
  lui $2, %hi(bios_read_protect)  # generate upper address
  ins $2, $4, 0, 2                # lower 2 bits contribute
  load_s8 bios_read_protect

execute_load_ewram_s8:
  translate_region_ewram patch_load_s8
  load_s8 (ewram + 0x8000)

execute_load_s8:
execute_load_iwram_s8:
  translate_region 3, patch_load_s8, (iwram + 0x8000), 0x7FFF
  load_s8 (iwram + 0x8000)

execute_load_io_s8:
  translate_region 4, patch_load_s8, io_registers, 0x3FF
  load_s8 io_registers

execute_load_palette_s8:
  translate_region 5, patch_load_s8, palette_ram, 0x3FF
  load_s8 palette_ram

execute_load_vram_s8:
  translate_region_vram patch_load_s8
  load_s8 vram

execute_load_oam_s8:
  translate_region 7, patch_load_s8, oam_ram, 0x3FF
  load_s8 oam_ram

execute_load_gamepak8_s8:
  translate_region_gamepak 8, patch_load_s8
  load_s8 0

execute_load_gamepak9_s8:
  translate_region_gamepak 9, patch_load_s8
  load_s8 0

execute_load_gamepakA_s8:
  translate_region_gamepak 10, patch_load_s8
  load_s8 0

execute_load_gamepakB_s8:
  translate_region_gamepak 11, patch_load_s8
  load_s8 0

execute_load_gamepakC_s8:
  translate_region_gamepak 12, patch_load_s8
  load_s8 0

execute_load_eeprom_s8:
  eeprom_load patch_load_s8

execute_load_backup_s8:
  backup_load patch_load_s8
  seb $2, $2                      # sign extend result (delay)

execute_load_open_s8:
  open_load8 patch_load_s8
  seb $2, $2                      # sign extend result (delay)

load_s8_ftable:
  .long execute_load_bios_s8      # 0x00 BIOS
  .long execute_load_open_s8      # 0x01 open address
  .long execute_load_ewram_s8     # 0x02 EWRAM
  .long execute_load_iwram_s8     # 0x03 IWRAM
  .long execute_load_io_s8        # 0x04 I/O registers
  .long execute_load_palette_s8   # 0x05 Palette RAM
  .long execute_load_vram_s8      # 0x06 VRAM
  .long execute_load_oam_s8       # 0x07 OAM RAM
  .long execute_load_gamepak8_s8  # 0x08 gamepak
  .long execute_load_gamepak9_s8  # 0x09 gamepak
  .long execute_load_gamepakA_s8  # 0x0A gamepak
  .long execute_load_gamepakB_s8  # 0x0B gamepak
  .long execute_load_gamepakC_s8  # 0x0C gamepak
  .long execute_load_eeprom_s8    # 0x0D gamepak/eeprom
  .long execute_load_backup_s8    # 0x0E Flash ROM/SRAM
  .long execute_load_open_s8      # 0x0F open address

patch_load_s8:
  patch_handler load_s8_ftable, 1



# Unsigned aligned 16bit load handlers

execute_load_bios_u16:
  region_check_align 0, 1, 0, patch_load_u16
  srl $2, $5, 14                  # check if PC is in BIOS region
  bne $2, $0, 1f                  # if not, perform BIOS protected read
  lui $1, %hi(bios_rom)           # generate upper address (delay)

  andi $4, $4, 0x3FFF             # generate offset
  addu $2, $1, $4
  load_u16 bios_rom

1:
  lui $2, %hi(bios_read_protect)  # generate upper address
  ins $2, $1, 0, 2                # bit 1 contributes
  load_u16 bios_read_protect

execute_load_ewram_u16:
  translate_region_ewram_load_align 1, 0, patch_load_u16
  load_u16 (ewram + 0x8000)

execute_load_u16:
execute_load_iwram_u16:
  translate_region_align 3, 1, 0, patch_load_u16, (iwram + 0x8000), 0x7FFF
  load_u16 (iwram + 0x8000)

execute_load_io_u16:
  translate_region_align 4, 1, 0, patch_load_u16, io_registers, 0x3FF
  load_u16 io_registers

execute_load_palette_u16:
  translate_region_align 5, 1, 0, patch_load_u16, palette_ram, 0x3FF
  load_u16 palette_ram

execute_load_vram_u16:
  translate_region_vram_load_align 1, 0, patch_load_u16
  load_u16 vram

execute_load_oam_u16:
  translate_region_align 7, 1, 0, patch_load_u16, oam_ram, 0x3FF
  load_u16 oam_ram

execute_load_gamepak8_u16:
  translate_region_gamepak_align 8, 1, 0, patch_load_u16
  load_u16 0

execute_load_gamepak9_u16:
  translate_region_gamepak_align 9, 1, 0, patch_load_u16
  load_u16 0

execute_load_gamepakA_u16:
  translate_region_gamepak_align 10, 1, 0, patch_load_u16
  load_u16 0

execute_load_gamepakB_u16:
  translate_region_gamepak_align 11, 1, 0, patch_load_u16
  load_u16 0

execute_load_gamepakC_u16:
  translate_region_gamepak_align 12, 1, 0, patch_load_u16
  load_u16 0

execute_load_eeprom_u16:
  eeprom_load_align 1, 0, patch_load_u16

execute_load_backup_u16:
  backup_load_align 1, 0, patch_load_u16
  nop

execute_load_open_u16:
  open_load16_align 1, 0, patch_load_u16
  nop


# Unsigned unaligned 16bit load handlers

execute_load_bios_u16u:
  region_check_align 0, 1, 1, patch_load_u16
  srl $2, $5, 14                  # check if PC is in BIOS region
  bne $2, $0, 1f                  # if not, perform BIOS protected read
  lui $1, %hi(bios_rom)           # generate upper address (delay)

  andi $4, $4, 0x3FFE             # generate offset
  addu $2, $1, $4
  load_u16_unaligned bios_rom

1:
  lui $2, %hi(bios_read_protect)  # generate upper address
  ext $1, $4, 1, 1
  ins $2, $1, 1, 1                # bit 1 contributes
  load_u16_unaligned bios_read_protect

execute_load_ewram_u16u:
  translate_region_ewram_load_align16 1, 1, patch_load_u16
  load_u16_unaligned (ewram + 0x8000)

execute_load_iwram_u16u:
  translate_region_align 3, 1, 1, patch_load_u16, (iwram + 0x8000), 0x7FFE