📄 cpu.c
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else \ { \ dest = (s16)read_memory16_signed(_address); \ } \} \#define fast_write_memory(size, type, address, value) \{ \ u8 *map; \ u32 _address = (address) & ~(aligned_address_mask##size & 0x03); \ if(_address < 0x10000000) \ { \ memory_region_access_write_##type[_address >> 24]++; \ memory_writes_##type++; \ } \ \ if(((_address & aligned_address_mask##size) == 0) && \ (map = memory_map_write[_address >> 15])) \ { \ *((type *)((u8 *)map + (_address & 0x7FFF))) = value; \ } \ else \ { \ cpu_alert = write_memory##size(_address, value); \ if(cpu_alert) \ goto alert; \ } \} \#define load_aligned32(address, dest) \{ \ u8 *map = memory_map_read[address >> 15]; \ if(address < 0x10000000) \ { \ memory_region_access_read_u32[address >> 24]++; \ memory_reads_u32++; \ } \ if(map) \ { \ dest = address32(map, address & 0x7FFF); \ } \ else \ { \ dest = read_memory32(address); \ } \} \#define store_aligned32(address, value) \{ \ u8 *map = memory_map_write[address >> 15]; \ if(address < 0x10000000) \ { \ memory_region_access_write_u32[address >> 24]++; \ memory_writes_u32++; \ } \ if(map) \ { \ address32(map, address & 0x7FFF) = value; \ } \ else \ { \ cpu_alert = write_memory32(address, value); \ if(cpu_alert) \ goto alert; \ } \} \#define load_memory_u8(address, dest) \ fast_read_memory(8, u8, address, dest) \#define load_memory_u16(address, dest) \ fast_read_memory(16, u16, address, dest) \#define load_memory_u32(address, dest) \ fast_read_memory(32, u32, address, dest) \#define load_memory_s8(address, dest) \ fast_read_memory(8, s8, address, dest) \#define load_memory_s16(address, dest) \ fast_read_memory_s16(address, dest) \#define store_memory_u8(address, value) \ fast_write_memory(8, u8, address, value) \#define store_memory_u16(address, value) \ fast_write_memory(16, u16, address, value) \#define store_memory_u32(address, value) \ fast_write_memory(32, u32, address, value) \#define no_op \#define arm_access_memory_writeback_yes(off_op) \ reg[rn] = address off_op \#define arm_access_memory_writeback_no(off_op) \#define arm_access_memory_pc_preadjust_load() \#define arm_access_memory_pc_preadjust_store() \ u32 reg_op = reg[rd]; \ if(rd == 15) \ reg_op += 4 \#define arm_access_memory_pc_postadjust_load() \ arm_update_pc() \#define arm_access_memory_pc_postadjust_store() \#define load_reg_op reg[rd] \#define store_reg_op reg_op \#define arm_access_memory(access_type, off_op, off_type, mem_type, \ wb, wb_off_op) \{ \ arm_pc_offset(8); \ arm_data_trans_##off_type(); \ u32 address = reg[rn] off_op; \ arm_access_memory_pc_preadjust_##access_type(); \ \ arm_pc_offset(-4); \ arm_access_memory_writeback_##wb(wb_off_op); \ access_type##_memory_##mem_type(address, access_type##_reg_op); \ arm_access_memory_pc_postadjust_##access_type(); \} \#define word_bit_count(word) \ (bit_count[word >> 8] + bit_count[word & 0xFF]) \#define sprint_no(access_type, pre_op, post_op, wb) \#define sprint_yes(access_type, pre_op, post_op, wb) \ printf("sbit on %s %s %s %s\n", #access_type, #pre_op, #post_op, #wb) \#define arm_block_writeback_load() \ if(!((reg_list >> rn) & 0x01)) \ { \ reg[rn] = address; \ } \#define arm_block_writeback_store() \ reg[rn] = address \#define arm_block_writeback_yes(access_type) \ arm_block_writeback_##access_type() \#define arm_block_writeback_no(access_type) \#define load_block_memory(address, dest) \ dest = address32(address_region, (address + offset) & 0x7FFF) \#define store_block_memory(address, dest) \ address32(address_region, (address + offset) & 0x7FFF) = dest \#define arm_block_memory_offset_down_a() \ (base - (word_bit_count(reg_list) * 4) + 4) \#define arm_block_memory_offset_down_b() \ (base - (word_bit_count(reg_list) * 4)) \#define arm_block_memory_offset_no() \ (base) \#define arm_block_memory_offset_up() \ (base + 4) \#define arm_block_memory_writeback_down() \ reg[rn] = base - (word_bit_count(reg_list) * 4) \#define arm_block_memory_writeback_up() \ reg[rn] = base + (word_bit_count(reg_list) * 4) \#define arm_block_memory_writeback_no() \#define arm_block_memory_load_pc() \ load_aligned32(address, pc); \ reg[REG_PC] = pc \#define arm_block_memory_store_pc() \ store_aligned32(address, pc + 4) \#define arm_block_memory(access_type, offset_type, writeback_type, s_bit) \{ \ arm_decode_block_trans(); \ u32 base = reg[rn]; \ u32 address = arm_block_memory_offset_##offset_type() & 0xFFFFFFFC; \ u32 i; \ \ arm_bloc
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