isr_vectors.c

使用摩托罗拉PC9CSDG128B单片机进行定时中断LCD显示

/************************************************
加入superman_lib个人库文件注意事项:
	1.把superman_lib拷贝到建立的工程目录下
	2.在main.c中加入如下头文件:
	#include"..\superman_lib\mc9s12dg128.h"
	3.mc9s12dg128.c中的#include<MC9S12DG128.H>
	修改为:#include"..\superman_lib\mc9s12dg128.h"
作者: superman ; At Mar,25,2006
************************************************/
extern void near _Startup(void);       /* Startup routine */

extern void near ECT0_ISR(void);

#pragma CODE_SEG __NEAR_SEG NON_BANKED /* Interrupt section for this module. Placement will be in NON_BANKED area. */
__interrupt void UnimplementedISR(void)
{
   /* Unimplemented ISRs trap.*/
//   asm BGND;
}

typedef void (*near tIsrFunc)(void);
const tIsrFunc _vect[] @0xFF80 = {     /* Interrupt table */
        UnimplementedISR,                 /* $FF80-$FF81;vector 63 */
        UnimplementedISR,                 /* $FF82-$FF83;vector 62 */
        UnimplementedISR,                 /* $FF84-$FF85;vector 61 */
        UnimplementedISR,                 /* $FF86-$FF87;vector 60 */
        UnimplementedISR,                 /* $FF88-$FF89;vector 59 */
        UnimplementedISR,                 /* $FF8A-$FF8B;vector 58 */
        UnimplementedISR,                 /* $FF8C-$FF8D;vector 57 */
        UnimplementedISR,                 /* $FF8E-$FF8F;vector 56 */
        UnimplementedISR,                 /* $FF90-$FF91;vector 55 */
        UnimplementedISR,                 /* $FF92-$FF93;vector 54:PWM Emergency Shutdown */
        UnimplementedISR,                 /* $FF94-$FF95;vector 53:Port P interrupt */
        UnimplementedISR,                 /* $FF96-$FF97;vector 52:CAN4 transmit */
        UnimplementedISR,                 /* $FF98-$FF99;vector 51:CAN4 Receive */
        UnimplementedISR,                 /* $FF9A-$FF9B;vector 50:CAN4 errors  */
        UnimplementedISR,                 /* $FF9C-$FF9D;vector 49:CAN4 wake-up */
        UnimplementedISR,                 /* $FF9E-$FF9F;vector 48:Reserved  */
        UnimplementedISR,                 /* $FFA0-$FFA1;vector 47:BF general */
        UnimplementedISR,                 /* $FFA2-$FFA3;vector 46:BF Synchronisation */
        UnimplementedISR,                 /* $FFA4-$FFA5;vector 45:BF receive */
        UnimplementedISR,                 /* $FFA6-$FFA7;vector 44:BF Rx FIFO not empty */
        UnimplementedISR,                 /* $FFA8-$FFA9;vector 43:CAN1 transmit */
        UnimplementedISR,                 /* $FFAA-$FFAB;vector 42:CAN1 Receive*/
        UnimplementedISR,                 /* $FFAC-$FFAD;vector 41:CAN1 errors  */
        UnimplementedISR,                 /* $FFAE-$FFAF;vector 40:CAN1 wake-up*/
        UnimplementedISR,                 /* $FFB0-$FFB1;vector 39:CAN0 transmit */
        UnimplementedISR,                 /* $FFB2-$FFB3;vector 38:CAN0 Receive */
        UnimplementedISR,                 /* $FFB4-$FFB5;vector 37:CAN0 errors */
        UnimplementedISR,                 /* $FFB6-$FFB7;vector 36:CAN0 wake-up */
        UnimplementedISR,                 /* $FFB8-$FFB9;vector 35:FLASH */
        UnimplementedISR,                 /* $FFBA-$FFBB;vector 34:EEPROM*/
        UnimplementedISR,                 /* $FFBC-$FFBD;vector 33:Reserved */
        UnimplementedISR,                 /* $FFBE-$FFBF;vector 32:SPI1 */
        UnimplementedISR,                 /* $FFC0-$FFC1;vector 31:IIC Bus */
        UnimplementedISR,                 /* $FFC2-$FFC3;vector 30:BDLC*/
        UnimplementedISR,                 /* $FFC4-$FFC5;vector 29:CRG Self Clock Mode*/
        UnimplementedISR,                 /* $FFC6-$FFC7;vector 28:CRG PLL lock */
        UnimplementedISR,                 /* $FFC8-$FFC9;vector 27:Pulse Accumulator B Overflow */
        UnimplementedISR,                 /* $FFCA-$FFCB;vector 26:Modulus Down Counter underflow */
        UnimplementedISR,                 /* $FFCC-$FFCD;vector 25:PORT H */
        UnimplementedISR,                 /* $FFCE-$FFCF;vector 24:PORT J */
        UnimplementedISR,                 /* $FFD0-$FFD1;vector 23:ATD1 */
        UnimplementedISR,                 /* $FFD2-$FFD3;vector 22:ATD0 */
        UnimplementedISR,                 /* $FFD4-$FFD5;vector 21:SCI1 */
        UnimplementedISR,                 /* $FFD6-$FFD7;vector 20:SCI0 */
        UnimplementedISR,                 /* $FFD8-$FFD9;vector 19:SPI0 ;SPI串行传输结束*/
        UnimplementedISR,                 /* $FFDA-$FFDB;vector 18:Pulse accumulator input edge */
        UnimplementedISR,                 /* $FFDC-$FFDD;vector 17:Pulse accumulator A overflow */
        UnimplementedISR,                 /* $FFDE-$FFDF;vector 16:ECT overflow */
        UnimplementedISR,                 /* $FFE0-$FFE1;vector 15:ECT channel 7 */
        UnimplementedISR,                 /* $FFE2-$FFE3;vector 14:ECT channel 6 */
        UnimplementedISR,                 /* $FFE4-$FFE5;vector 13:ECT channel 5 */
        UnimplementedISR,                 /* $FFE6-$FFE7;vector 12:ECT channel 4 */
        UnimplementedISR,                 /* $FFE8-$FFE9;vector 11:ECT channel 3 */
        UnimplementedISR,                 /* $FFEA-$FFEB;vector 10:ECT channel 2 */
        UnimplementedISR,                 /* $FFEC-$FFED;vector 09:ECT channel 1 */
        ECT0_ISR,                  /* $FFEE-$FFEF;vector 08:ECT channel 0 */
        UnimplementedISR,                  /* $FFF0-$FFF1;vector 07:Real Time Interrupt */
        UnimplementedISR,                 /* $FFF2-$FFF3;vector 06:IRQ */
        UnimplementedISR,                 /* $FFF4-$FFF5;vector 05:XIRQ/BF High prio Sync pulse intr */
        UnimplementedISR,                 /* $FFF6-$FFF7;vector 04:SWI */
        UnimplementedISR,                 /* $FFF8-$FFF9;vector 03:Unimplemented instruction trap */
        UnimplementedISR,                 /* $FFFA-$FFFB;vector 02:COP failure reset */
        UnimplementedISR,                 /* $FFFC-$FFFD;vector 01:Clock Monitor fail reset */
       _Startup                       /* $FFFE-$FFFF;Reset vector */
   };