📄 rx900-ok.lst
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MPASM 03.20.02 Released RX900-OK.ASM 12-2-2003 17:02:41 PAGE 1
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
00001 ;***********************************************************************************
00002 ;* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
00003 ; project: RF 900 MHz radio communication module
00004 ; filename: Rx900-OK.asm
00005 ; mcu: pic12c509a
00006 ; pin define:
00007 ; ________
00008 ; VCC--| o |--VSS
00009 ; ENABLE--| |--SOLENOID
00010 ; NC--| |--BUZZER
00011 ; DATA--| |--NC
00012 ; --------
00013 ;***********************************************************************************
00014 ;***********************************************************************************
00015 ; The STATUS register
00016
00017 ;bit 7: GPWUF: GPIO reset bit
00018 ; 1 = Reset due to wake-up from SLEEP on pin change
00019 ; 0 = After power up or other reset
00020 ;bit 6: Unimplemented
00021 ;bit 5: PA0: Program page preselect bits
00022 ; 1 = Page 1 (200h - 3FFh) - PIC12C509, PIC12C509A, PIC12CR509A and PIC12CE519
00023 ; 0 = Page 0 (000h - 1FFh) - PIC12C5XX
00024 ; Each page is 512 bytes.
00025 ; Using the PA0 bit as a general purpose read/write bit in devices which do not
00026 ; use it for program
00027 ; page preselect is not recommended since this may affect upward compatibility
00028 ; with future products.
00029 ;bit 4: TO: Time-out bit
00030 ; 1 = After power-up, CLRWDT instruction, or SLEEP instruction
00031 ; 0 = A WDT time-out occurred
00032 ;bit 3: PD: Power-down bit
00033 ; 1 = After power-up or by the CLRWDT instruction
00034 ; 0 = By execution of the SLEEP instruction
00035 ;bit 2: Z: Zero bit
00036 ; 1 = The result of an arithmetic or logic operation is zero
00037 ; 0 = The result of an arithmetic or logic operation is not zero
00038 ;bit 1: DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)
00039 ; ADDWF
00040 ; 1 = A carry from the 4th low order bit of the result occurred
00041 ; 0 = A carry from the 4th low order bit of the result did not occur
00042 ; SUBWF
00043 ; 1 = A borrow from the 4th low order bit of the result did not occur
00044 ; 0 = A borrow from the 4th low order bit of the result occurred
00045 ;bit 0: C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
00046 ;***********************************************************************************
00047 ;The code init. OPTION set.
00048
00049 ;bit 7: GPWU: Enable wake-up on pin change (GP0, GP1, GP3)
00050 ; 1 = Disabled
00051 ; 0 = Enabled
00052 ;bit 6: GPPU: Enable weak pull-ups (GP0, GP1, GP3)
00053 ; 1 = Disabled
MPASM 03.20.02 Released RX900-OK.ASM 12-2-2003 17:02:41 PAGE 2
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
00054 ; 0 = Enabled
00055 ;bit 5: T0CS: Timer0 clock source select bit
00056 ; 1 = Transition on T0CKI pin
00057 ; 0 = Transition on internal instruction cycle clock, Fosc/4
00058 ;bit 4: T0SE: Timer0 source edge select bit
00059 ; 1 = Increment on high to low transition on the T0CKI pin
00060 ; 0 = Increment on low to high transition on the T0CKI pin
00061 ;bit 3: PSA: Prescaler assignment bit
00062 ; 1 = Prescaler assigned to the WDT
00063 ; 0 = Prescaler assigned to Timer0
00064 ;bit 2-0: PS2:PS0: Prescaler rate select bits
00065 ; Bit Value Timer0 Rate WDT Rate
00066 ; 000 1 : 2 1 : 1
00067 ; 001 1 : 4 1 : 2
00068 ; 010 1 : 8 1 : 4
00069 ; 011 1 : 16 1 : 8
00070 ; 100 1 : 32 1 : 16
00071 ; 101 1 : 64 1 : 32
00072 ; 110 1 : 128 1 : 64
00073 ; 111 1 : 256 1 : 128
00074 ;***********************************************************************************
00075 ;------------------------
00076 ;special register define
00077 ;------------------------
00000000 00078 INDF EQU 0H
00000001 00079 TMR0 EQU 1H
00000002 00080 PCL EQU 2H
00000003 00081 STATUS EQU 3H
00000004 00082 FSR EQU 4H
00000005 00083 OSCCAL EQU 5H
00000006 00084 GPIO EQU 6H
00085 ;-------------------
00086 ;special bit define
00087 ;-------------------
00000000 00088 C EQU 0
00000001 00089 DC EQU 1
00000002 00090 Z EQU 2
00000003 00091 PD EQU 3
00000004 00092 TO EQU 4
00000005 00093 PA0 EQU 5
00094 ;
00000007 00095 GPWUF EQU 7
00096
00097 ;------------------------
00098 ;General register define
00099 ;------------------------
00000008 00100 COMPARE_BUF EQU 08H
00000009 00101 COUNTER_BUF EQU 09H
0000000A 00102 TEMP_BUF EQU 0AH
00000010 00103 PUL_BREADTH EQU 10H
00000011 00104 BIT_CONT EQU 11H
00000012 00105 DATA_BUF EQU 12H
00000013 00106 DATA_TMP EQU 13H
MPASM 03.20.02 Released RX900-OK.ASM 12-2-2003 17:02:41 PAGE 3
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
00000014 00107 PAGE_CNT EQU 14H
00000015 00108 R0 EQU 15H
00000016 00109 R1 EQU 16H
00000017 00110 R2 EQU 17H
00000018 00111 AGO_BIT EQU 18H
00000019 00112 NOW_BIT EQU 19H
0000001A 00113 LOOK_CONT EQU 1AH
0000001B 00114 ID_CONT EQU 1BH
0000001C 00115 ID_CODE EQU 1CH
0000001D 00116 COUNT1 EQU 1DH
0000001E 00117 COUNT2 EQU 1EH
0000001F 00118 BIT_BUF EQU 1FH
00119 ;---------------------
00120 ;port define
00121 ;---------------------
00000002 00122 DAT EQU 2
00000000 00123 ENABLE EQU 0
00000005 00124 SPRAY EQU 5
00000004 00125 BUZZER EQU 4
00126 ;---------------------
00127 ;Value define
00128 ;---------------------
00129 ; pulse breadth value
00130 ;
00000041 00131 ONE_BREADTHUP SET D'65' ; +1
0000003C 00132 ONE_BREADTH SET D'60' ; BIT "1" 0.5mS
00000037 00133 ONE_BREADTHDN SET D'55' ; -1
00134
0000002D 00135 ZER_BREADTHUP SET D'45' ; +1
00000028 00136 ZER_BREADTH SET D'40' ; BIT "0" 1mS
00000023 00137 ZER_BREADTHDN SET D'35' ; -1
00138
00000019 00139 STA_BREADTHUP SET D'25' ; +1
00000014 00140 STA_BREADTH SET D'20' ; BIT "STA" 2mS
0000000F 00141 STA_BREADTHDN SET D'15' ; -1
00142
00143 ;-------------------------------
00144 ;**** SPRAY long command: 0FH
00145 ;**** SPRAY brief command: 55H
00146 ;**** BUZZER command: AAH
00147 ;*********************************************************************
00148 ;*********************************************************************
0000 00149 ORG 000H
0000 0025 00150 MOVWF OSCCAL
0001 0A10 00151 GOTO MAIN
00152 ;*********************************************************************
00153 ;**** the NOP is uniform to address 010H of ROM
0002 0000 00154 NOP
0003 0000 00155 NOP
0004 0000 00156 NOP
0005 0000 00157 NOP
0006 00158 GET_ID
0006 021B 00159 MOVFW ID_CONT ; ID number to W
MPASM 03.20.02 Released RX900-OK.ASM 12-2-2003 17:02:41 PAGE 4
LOC OBJECT CODE LINE SOURCE TEXT
VALUE
Message[305]: Using default destination of 1 (file).
0007 01E2 00160 ADDWF PCL ; Add W to PC
0008 0856 00161 RETLW 056H ; the ID number can alter at program MCU
0009 08AA 00162 RETLW 0AAH
000A 08AA 00163 RETLW 0AAH
00164 ;*********************************************************************
0010 00165 ORG 010H
0010 00166 MAIN
0010 0064 00167 CLRF FSR ; Select blank 0
0011 0203 00168 MOVFW STATUS ; STATUS register to W
0012 0E98 00169 ANDLW B'10011000' ; check power on of start
0013 002A 00170 MOVWF TEMP_BUF
0014 0643 00171 SKPNZ
0015 0A23 00172 GOTO WDT_WAKE ; is WDT wake the sleep
00173 ;**** is other reset
0016 00174 POWER_UP
0016 09D2 00175 CALL INIT_TMR0
0017 09CE 00176 CALL INIT_GPIO
00177 ;=====================================================================
0018 00178 M_LOOP
0018 0406 00179 BCF GPIO,ENABLE ; start sleep of send board
0019 09D2 00180 CALL INIT_TMR0
001A 0000 00181 NOP
001B 0000 00182 NOP
001C 0000 00183 NOP
001D 0000 00184 NOP
001E 0003 00185 SLEEP ; the MCU start sleep
001F 0000 00186 NOP
0020 0000 00187 NOP
0021 0000 00188 NOP
0022 0000 00189 NOP
0023 00190 WDT_WAKE
0023 0C64 00191 MOVLW D'100'
0024 09D7 00192 CALL DELAYX
0025 09D2 00193 CALL INIT_TMR0
0026 09CE 00194 CALL INIT_GPIO
0027 0506 00195 BSF GPIO,ENABLE ; the send board start activity
0028 0C01 00196 MOVLW D'1'
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