📄 24cxxmain.s
字号:
.module _24CxxMain.c
.area text(rom, con, rel)
.dbfile E:\avr\m16_twi_24x\24CxxMain.c
.dbfunc e main _main fV
; y -> R14,R15
; x -> R10,R11
; w -> R12,R13
; b -> R20,R21
; r -> R22,R23
; c -> y+4
; i -> y+2
.even
_main::
sbiw R28,6
.dbline -1
.dbline 13
; #include<iom16v.h>
; #include<macros.h>
; #include"xd.h"
; #define XDmain
; #include"xdprj.h"
;
;
; uchar r_buf[64];
;
; uchar w_buf[64];
;
; void main()
; {
.dbline 24
; uint i;
;
; uchar *r;
; uint b;
; uint c;
;
; uchar *w;
; uint x;
; uint y;
;
; tms(100);
ldi R16,100
xcall _tms
.dbline 27
;
; //-----初始化cpu------
; setreg_m16(); //初始化cpu
xcall _setreg_m16
.dbline 30
;
;
; for(i=0;i<64;i++) //清主机读和写缓存区
clr R0
clr R1
std y+3,R1
std y+2,R0
xjmp L5
L2:
.dbline 31
ldi R24,<_w_buf
ldi R25,>_w_buf
ldd R30,y+2
ldd R31,y+3
add R30,R24
adc R31,R25
clr R2
std z+0,R2
ldi R24,<_r_buf
ldi R25,>_r_buf
ldd R30,y+2
ldd R31,y+3
add R30,R24
adc R31,R25
std z+0,R2
L3:
.dbline 30
ldd R24,y+2
ldd R25,y+3
adiw R24,1
std y+3,R25
std y+2,R24
L5:
.dbline 30
ldd R24,y+2
ldd R25,y+3
cpi R24,64
ldi R30,0
cpc R25,R30
brlo L2
.dbline 33
; r_buf[i]=w_buf[i]=0;
;
; for(i=0;i<64;i++) //写缓存区赋初值
clr R0
clr R1
std y+3,R1
std y+2,R0
xjmp L9
L6:
.dbline 34
ldi R24,<_w_buf
ldi R25,>_w_buf
ldd R30,y+2
ldd R31,y+3
add R30,R24
adc R31,R25
ldd R2,y+2
ldd R3,y+3
std z+0,R2
L7:
.dbline 33
ldd R24,y+2
ldd R25,y+3
adiw R24,1
std y+3,R25
std y+2,R24
L9:
.dbline 33
ldd R24,y+2
ldd R25,y+3
cpi R24,64
ldi R30,0
cpc R25,R30
brlo L6
.dbline 36
; w_buf[i]=i;
;
; r=r_buf; //读参数
ldi R22,<_r_buf
ldi R23,>_r_buf
.dbline 37
; b=0x00;
clr R20
clr R21
.dbline 38
; c=64;
ldi R24,64
ldi R25,0
std y+5,R25
std y+4,R24
.dbline 40
;
; w=w_buf; //写参数
ldi R24,<_w_buf
ldi R25,>_w_buf
movw R12,R24
.dbline 41
; x=0x00;
clr R10
clr R11
.dbline 42
; y=64;
ldi R24,64
ldi R25,0
movw R14,R24
.dbline 44
;
; wt24c(w,x,y); //写
std y+1,R15
std y+0,R14
movw R18,R10
movw R16,R12
xcall _wt24c
.dbline 46
;
; rd24c(r,b,c); //读
ldd R0,y+4
ldd R1,y+5
std y+1,R1
std y+0,R0
movw R18,R20
movw R16,R22
xcall _rd24c
.dbline 49
;
; //-----读出的数据发送到PC-----
; for(i=0;i<64;i++)
clr R0
clr R1
std y+3,R1
std y+2,R0
xjmp L13
L10:
.dbline 50
ldi R24,<_r_buf
ldi R25,>_r_buf
ldd R30,y+2
ldd R31,y+3
add R30,R24
adc R31,R25
ldd R2,z+0
ldi R24,<_txd_buf
ldi R25,>_txd_buf
ldd R30,y+2
ldd R31,y+3
add R30,R24
adc R31,R25
std z+0,R2
L11:
.dbline 49
ldd R24,y+2
ldd R25,y+3
adiw R24,1
std y+3,R25
std y+2,R24
L13:
.dbline 49
ldd R24,y+2
ldd R25,y+3
cpi R24,64
ldi R30,0
cpc R25,R30
brlo L10
.dbline 52
; txd_buf[i]=r_buf[i];
;
; txd_buf[69]=syserr;
lds R2,_syserr
sts _txd_buf+69,R2
.dbline 54
;
; txdpo(txd_buf, 69);
ldi R18,69
ldi R16,<_txd_buf
ldi R17,>_txd_buf
xcall _txdpo
L15:
.dbline 56
L16:
.dbline 56
;
; while(1);
xjmp L15
X0:
.dbline 59
; //----------------------------
;
; c=0;
clr R0
clr R1
std y+5,R1
std y+4,R0
.dbline -2
L1:
adiw R28,6
.dbline 0 ; func end
ret
.dbsym r y 14 i
.dbsym r x 10 i
.dbsym r w 12 pc
.dbsym r b 20 i
.dbsym r r 22 pc
.dbsym l c 4 i
.dbsym l i 2 i
.dbend
.dbfunc e port_init _port_init fV
.even
_port_init::
.dbline -1
.dbline 73
;
;
; }
;
;
;
; //-------------------------------------------------------------------------------------------------------------------------
; //ICC-AVR application builder : 2005-11-9 22:09:34
; // Target : M16
; // Crystal: 8.0000Mhz
;
;
; void port_init(void)
; {
.dbline 74
; PORTA = 0xFF;
ldi R24,255
out 0x1b,R24
.dbline 75
; DDRA = 0x00;
clr R2
out 0x1a,R2
.dbline 76
; PORTB = 0xFF;
out 0x18,R24
.dbline 77
; DDRB = 0x00;
out 0x17,R2
.dbline 78
; PORTC = 0xFF; //m103 output only
out 0x15,R24
.dbline 79
; DDRC = 0x00;
out 0x14,R2
.dbline 80
; PORTD = 0xFF;
out 0x12,R24
.dbline 81
; DDRD = 0x00;
out 0x11,R2
.dbline -2
L18:
.dbline 0 ; func end
ret
.dbend
.dbfunc e twi_init _twi_init fV
.even
_twi_init::
.dbline -1
.dbline 87
; }
;
; //TWI initialize
; // bit rate:100
; void twi_init(void)
; {
.dbline 88
; TWCR= 0X00; //disable twi
clr R2
out 0x36,R2
.dbline 89
; TWBR= 0x64; //set bit rate
ldi R24,100
out 0x0,R24
.dbline 90
; TWSR= 0x00; //set prescale
out 0x1,R2
.dbline 91
; TWAR= 0x00; //set slave address
out 0x2,R2
.dbline 92
; TWCR= 0x04; //enable twi
ldi R24,4
out 0x36,R24
.dbline -2
L19:
.dbline 0 ; func end
ret
.dbend
.dbfunc e uart0_init _uart0_init fV
.even
_uart0_init::
.dbline -1
.dbline 101
; }
;
; //UART0 initialize
; // desired baud rate: 9600
; // actual: baud rate:9615 (0.2%)
; // char size: 8 bit
; // parity: Disabled
; void uart0_init(void)
; {
.dbline 102
; UCSRB = 0x00; //disable while setting baud rate
clr R2
out 0xa,R2
.dbline 103
; UCSRA = 0x00;
out 0xb,R2
.dbline 104
; UCSRC = BIT(URSEL) | 0x06;
ldi R24,134
out 0x20,R24
.dbline 105
; UBRRL = 0x33; //set baud rate lo
ldi R24,51
out 0x9,R24
.dbline 106
; UBRRH = 0x00; //set baud rate hi
out 0x20,R2
.dbline 107
; UCSRB = 0x08;
ldi R24,8
out 0xa,R24
.dbline -2
L20:
.dbline 0 ; func end
ret
.dbend
.dbfunc e setreg_m16 _setreg_m16 fV
.even
_setreg_m16::
.dbline -1
.dbline 112
; }
;
; //call this routine to initialize all peripherals
; void setreg_m16(void)
; {
.dbline 114
; //stop errant interrupts until set up
; CLI(); //disable all interrupts
cli
.dbline 115
; port_init();
xcall _port_init
.dbline 116
; twi_init();
xcall _twi_init
.dbline 117
; uart0_init();
xcall _uart0_init
.dbline 119
;
; MCUCR = 0x00;
clr R2
out 0x35,R2
.dbline 120
; GICR = 0x00;
out 0x3b,R2
.dbline 121
; TIMSK = 0x00; //timer interrupt sources
out 0x39,R2
.dbline 122
; SEI(); //re-enable interrupts
sei
.dbline -2
L21:
.dbline 0 ; func end
ret
.dbend
.area bss(ram, con, rel)
.dbfile E:\avr\m16_twi_24x\24CxxMain.c
_w_buf::
.blkb 64
.dbsym e w_buf _w_buf A[64:64]c
_r_buf::
.blkb 64
.dbsym e r_buf _r_buf A[64:64]c
_txd_buf::
.blkb 70
.dbfile E:\avr\m16_twi_24x/xdprj.h
.dbsym e txd_buf _txd_buf A[70:70]c
_syserr::
.blkb 1
.dbsym e syserr _syserr c
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