iomaxq200x.h

第一块板是飞思卡尔的MX9823ADS评估板

__no_init volatile __io union
{
  unsigned char T2CNA0;
  struct
  {
    unsigned char G2EN           : 1;
    unsigned char SS2            : 1;
    unsigned char CPRL2          : 1;
    unsigned char TR2            : 1;
    unsigned char TR2L           : 1;
    unsigned char T2POL0         : 1;
    unsigned char T2OE0          : 1;
    unsigned char ET2            : 1;
  } T2CNA0_bit;
} @ _M(3,0);

__no_init volatile __io unsigned char T2H0 @ _M(3,1);   /* Timer 0: Type 2 Most Significant Byte Value */
__no_init volatile __io unsigned char T2RH0 @ _M(3,2);   /* Timer 0: Type 2 Most Significant Byte Reload */
__no_init volatile __io unsigned char T2CH0 @ _M(3,3);   /* Timer 0: Type 2 Most Significant Byte Capture/Compare */

/* SPI Data Buffer Register */
__no_init volatile __io unsigned short SPIB @ _M(3,5);


/* Serial Port Control Register */
__no_init volatile __io union
{
  unsigned char SCON1;
  struct
  {
    unsigned char RI             : 1;
    unsigned char TI             : 1;
    unsigned char RB8            : 1;
    unsigned char TB8            : 1;
    unsigned char REN            : 1;
    unsigned char SM2            : 1;
    unsigned char SM1            : 1;
    unsigned char SM0FE          : 1;
  } SCON1_bit;
} @ _M(3,6);

__no_init volatile __io unsigned char SBUF1 @ _M(3,7);   /* Serial Data Buffer */

/* Serial Port Mode Register */
__no_init volatile __io union
{
  unsigned char SMD1;
  struct
  {
    unsigned char FEDE           : 1;
    unsigned char SMOD           : 1;
    unsigned char ESI            : 1;
  } SMD1_bit;
} @ _M(3,8);

__no_init volatile __io unsigned short PR1 @ _M(3,9);   /* Phase Register */

/* Timer 0: Type 2 Control Register B */
__no_init volatile __io union
{
  unsigned char T2CNB0;
  struct
  {
    unsigned char TC2L           : 1;
    unsigned char TCC2           : 1;
    unsigned char TF2L           : 1;
    unsigned char TF2            : 1;
    unsigned char                : 1;
    unsigned char T2POL1         : 1;
    unsigned char T2OE1          : 1;
    unsigned char ET2L           : 1;
  } T2CNB0_bit;
} @ _M(3,0xC);

__no_init volatile __io unsigned short T2V0 @ _M(3,0xD);   /* Timer 0: Type 2 Value Register */
__no_init volatile __io unsigned short T2R0 @ _M(3,0xE);   /* Timer 0: Type 2 Reload Register */
__no_init volatile __io unsigned short T2C0 @ _M(3,0xF);   /* Timer 0: Type 2 Capture/Compare Register */

/* Timer 0: Type 2 Configuration Register */
__no_init volatile __io union
{
  unsigned char T2CFG0;
  struct
  {
    unsigned char CT             : 1;
    unsigned char CCF            : 2;
    unsigned char T2MD           : 1;
    unsigned char T2DIV          : 3;
    unsigned char T2CI           : 1;
  } T2CFG0_bit;
} @ _M(3,0x10);

/* One Wire Master Address */
__no_init volatile __io union
{
  unsigned char OWA;
  struct
  {
    unsigned char A0             : 1;
    unsigned char A1             : 1;
    unsigned char A2             : 1;
  } OWA_bit;
} @ _M(3,0x13);

/* One Wire Master Data */
__no_init volatile __io unsigned char OWD @ _M(3,0x14);

/* SPI Control Register */
__no_init volatile __io union
{
  unsigned char SPICN;
  struct
  {
    unsigned char SPIEN          : 1;
    unsigned char MSTM           : 1;
    unsigned char MODFE          : 1;
    unsigned char MODF           : 1;
    unsigned char WCOL           : 1;
    unsigned char ROVR           : 1;
    unsigned char SPIC           : 1;
    unsigned char STBY           : 1;
  } SPICN_bit;
} @ _M(3,0x15);


/* SPI Configuration Register */
__no_init volatile __io union
{
  unsigned char SPICF;
  struct
  {
    unsigned char CKPOL          : 1;
    unsigned char CKPHA          : 1;
    unsigned char CHR            : 1;
    unsigned char                : 4;
    unsigned char ESPII          : 1;
  } SPICF_bit;
} @ _M(3,0x16);

__no_init volatile __io unsigned char SPICK @ _M(3,0x17);   /* SPI Clock Register */

__no_init volatile __io unsigned short ICDT0 @ _M(3,0x18);   /* In-circuit Debug Temp 0 Register */
__no_init volatile __io unsigned short ICDT1 @ _M(3,0x19);   /* In-circuit Debug Temp 1 Register */

/* In-circuit Debug Control Register */
__no_init volatile __io union
{
  unsigned char ICDC;
  struct
  {
    unsigned char CMD0           : 1;
    unsigned char CMD1           : 1;
    unsigned char CMD2           : 1;
    unsigned char CMD3           : 1;
    unsigned char                : 1;
    unsigned char REGE           : 1;
    unsigned char                : 1;
    unsigned char DME            : 1;
  } ICDC_bit;
} @ _M(3,0x1A);


/* In-circuit Debug Flag Register */
__no_init volatile __io union
{
  unsigned char ICDF;
  struct
  {
    unsigned char TXC            : 1;
    unsigned char SPE            : 1;
    unsigned char PSS0           : 1;
    unsigned char PSS1           : 1;
  } ICDF_bit;
} @ _M(3,0x1B);

__no_init volatile __io unsigned char ICDB @ _M(3,0x1C);   /* In-circuit Debug Buffer Register */
__no_init volatile __io unsigned char ICDA @ _M(3,0x1D);   /* In-circuit Debug Address Register */
__no_init volatile __io unsigned char ICDD @ _M(3,0x1E);   /* In-circuit Debug Data Register */


/* Test Mode Register */
__no_init volatile __io union
{
  unsigned short TM;
  struct
  {
    unsigned short TME           : 1;
    unsigned short CKT           : 1;
    unsigned short SRT           : 1;
    unsigned short ROUT          : 1;
    unsigned short DOFF          : 1;
    unsigned short IDDQ          : 1;
    unsigned short DCW           : 1;
    unsigned short COUT          : 1;
  } TM_bit;
} @ _M(3,0x1F);

/*-------------------------------*
 *           Module 4            *
 *-------------------------------*/

/* Timer 1: Type 2 Control Register A */
__no_init volatile __io union
{
  unsigned char T2CNA1;
  struct
  {
    unsigned char G2EN           : 1;
    unsigned char SS2            : 1;
    unsigned char CPRL2          : 1;
    unsigned char TR2            : 1;
    unsigned char TR2L           : 1;
    unsigned char T2POL0         : 1;
    unsigned char T2OE0          : 1;
    unsigned char ET2            : 1;
  } T2CNA1_bit;
} @ _M(4,0);

__no_init volatile __io unsigned char T2H1 @ _M(4,1);   /* Timer 1: Type 2 Most Significant Byte Value */
__no_init volatile __io unsigned char T2RH1 @ _M(4,2);   /* Timer 1: Type 2 Most Significant Byte Reload */
__no_init volatile __io unsigned char T2CH1 @ _M(4,3);   /* Timer 1: Type 2 Most Significant Byte Capture/Compare */

/* Timer 2: Type 2 Control Register A */
__no_init volatile __io union
{
  unsigned char T2CNA2;
  struct
  {
    unsigned char G2EN           : 1;
    unsigned char SS2            : 1;
    unsigned char CPRL2          : 1;
    unsigned char TR2            : 1;
    unsigned char TR2L           : 1;
    unsigned char T2POL0         : 1;
    unsigned char T2OE0          : 1;
    unsigned char ET2            : 1;
  } T2CNA2_bit;
} @ _M(4,4);

__no_init volatile __io unsigned char T2H2 @ _M(4,5);   /* Timer 2: Type 2 Most Significant Byte Value */
__no_init volatile __io unsigned char T2RH2 @ _M(4,6);   /* Timer 2: Type 2 Most Significant Byte Reload */
__no_init volatile __io unsigned char T2CH2 @ _M(4,7);   /* Timer 2: Type 2 Most Significant Byte Capture/Compare */


/* Timer 1: Type 2 Control Register B */
__no_init volatile __io union
{
  unsigned char T2CNB1;
  struct
  {
    unsigned char TC2L           : 1;
    unsigned char TCC2           : 1;
    unsigned char TF2L           : 1;
    unsigned char TF2            : 1;
    unsigned char                : 1;
    unsigned char T2POL1         : 1;
    unsigned char T2OE1          : 1;
    unsigned char ET2L           : 1;
  } T2CNB1_bit;
} @ _M(4,8);

__no_init volatile __io unsigned short T2V1 @ _M(4,9);   /* Timer 1: Type 2 Value Register */
__no_init volatile __io unsigned short T2R1 @ _M(4,0xA); /* Timer 1: Type 2 Reload Register */
__no_init volatile __io unsigned short T2C1 @ _M(4,0xB); /* Timer 1: Type 2 Capture/Compare Register */

/* Timer 2: Type 2 Control Register B */
__no_init volatile __io union
{
  unsigned char T2CNB2;
  struct
  {
    unsigned char TC2L           : 1;
    unsigned char TCC2           : 1;
    unsigned char TF2L           : 1;
    unsigned char TF2            : 1;
    unsigned char                : 1;
    unsigned char T2POL1         : 1;
    unsigned char T2OE1          : 1;
    unsigned char ET2L           : 1;
  } T2CNB2_bit;
} @ _M(4,0xC);

__no_init volatile __io unsigned short T2V2 @ _M(4,0xD);  /* Timer 2: Type 2 Value Register */
__no_init volatile __io unsigned short T2R2 @ _M(4,0xE);  /* Timer 2: Type 2 Reload Register */
__no_init volatile __io unsigned short T2C2 @ _M(4,0xF); /* Timer 2: Type 2 Capture/Compare Register */

/* Timer 1: Type 2 Configuration Register */
__no_init volatile __io union
{
  unsigned char T2CFG1;
  struct
  {
    unsigned char CT             : 1;
    unsigned char CCF            : 2;
    unsigned char T2MD           : 1;
    unsigned char T2DIV          : 3;
    unsigned char T2CI           : 1;
  } T2CFG1_bit;
} @ _M(4,0x10);

/* Timer 0: Type 2 Configuration Register */
__no_init volatile __io union
{
  unsigned char T2CFG2;
  struct
  {
    unsigned char CT             : 1;
    unsigned char CCF            : 2;
    unsigned char T2MD           : 1;
    unsigned char T2DIV          : 3;
    unsigned char T2CI           : 1;
  } T2CFG2_bit;
} @ _M(4,0x11);


/*-------------------------------*
 *           Module 8            *
 *-------------------------------*/

/* Only CKCN and WDCN are defined in this file, the rest of the */
/* registers in Module 8 can be found in iomaxq.h.              */

/* Clock Control register */
__no_init volatile __io union
{
  unsigned char CKCN;
  struct
  {
    unsigned char CD0            : 1;
    unsigned char CD1            : 1;
    unsigned char PMME           : 1;
    unsigned char SWB            : 1;
    unsigned char STOP           : 1;
    unsigned char RGMD           : 1;
    unsigned char RGSL           : 1;
    unsigned char XTRC           : 1;
  } CKCN_bit;
} @ _M(8,0x0E);


/* Watchdog Control register */
__no_init volatile __io union
{
  unsigned char WDCN;
  struct
  {
    unsigned char RWT            : 1;
    unsigned char EWT            : 1;
    unsigned char WTRF           : 1;
    unsigned char WDIF           : 1;
    unsigned char WD0            : 1;
    unsigned char WD1            : 1;
    unsigned char EWDI           : 1;
    unsigned char POR            : 1;
  } WDCN_bit;
} @ _M(8,0x0F);


#pragma language=default
#endif  /* __IAR_SYSTEMS_ICC__  */
#endif /* __IOMAXQ200X */