gateway_data.cxgate

CAN 网关原代码,汽车电子中的总线网关

#include "gateway_data_dims.h"
#include "peripherals.h"
#include "gateway.h"

#pragma CODE_SEG XGATE_CODE
#pragma DATA_SEG __RPAGE_SEG XGATE_DATA

#if (GATEWAY_TX_FRM_CNT>0)
/* Tx Data Buffer declarations */
unsigned char Frm0Data[7];
unsigned char Frm1Data[7];
unsigned char Frm2Data[8];
unsigned char Frm3Data[2];

tTxFrmDescr TxTable[GATEWAY_TX_FRM_CNT]={
	{ /* Tx Frame #0 */
		0x30,	/* Tx ID */
		0,	/* Tx Node */
		{	/* Tx Timer */
			100,	/* reload */
			100,	/* counter */
		},	/* End of Tx Timer */
		(unsigned char *)&Frm0Data,	/* Pointer to data */
		0x1F,	/* timer_prescaller */
		7,	/* DataSize */
		0,	/* TxonRx */
		0,	/* TxonDataChg */
		0,	/* TxScheduled */
	}, /* Tx Frame #0 end */
	{ /* Tx Frame #1 */
		0x105,	/* Tx ID */
		1,	/* Tx Node */
		{	/* Tx Timer */
			0,	/* reload */
			0	/* counter */
		},	/* End of Tx Timer */
		(unsigned char *)&Frm1Data,	/* Pointer to data */
		0x00,	/* timer_prescaller (timer inactive) */
		7,	/* DataSize */
		0,	/* TxonRx */
		1,	/* TxonDataChg */
		0,	/* TxScheduled */
	}, /* Tx Frame #1 end */
	{ /* Tx Frame #2 */
		LIN_ID(0x33),	/* Tx ID */
		2,	/* Tx Node */
		{	/* Tx Timer */
			5,	/* reload */
			5,	/* counter */
		},	/* End of Tx Timer */
		(unsigned char *)&Frm2Data,	/* Pointer to data */
		0x10,	/* timer_prescaller */
		8,	/* DataSize */
		1,	/* TxonRx */
		0,	/* TxonDataChg */
		0,	/* TxScheduled */
	}, /* Tx Frame #2 end */
	{ /* Tx Frame #3 */
		LIN_ID(0x47),	/* Tx ID */
		3,	/* Tx Node */
		{	/* Tx Timer */
			1,	/* reload */
			1,	/* counter */
		},	/* End of Tx Timer */
		(unsigned char *)&Frm3Data,	/* Pointer to data */
		0x00,	/* timer_prescaller */
		2,	/* DataSize */
		0,	/* TxonRx */
		0,	/* TxonDataChg */
		0,	/* TxScheduled */
	}, /* Tx Frame #3 end */
}; /* End of TxTable */
#endif

#if (GATEWAY_RX_FRM_CNT>0)
const struct { /* Signal desriptors */
	struct { /* Frame #0 Signal Descriptor */
		tSignalDescr sig0;
		tSignalDestDescr sig0dest0;
		tSignalDestDescr sig0dest1;
		tSignalDescr sig1;
		tSignalDestDescr sig1dest0;
	} Frm0Sigs;
	struct { /* Frame #1 Signal Descriptor */
		tSignalDescr sig0;
		tSignalDestDescr sig0dest0;
		tSignalDestDescr sig0dest1;
		tSignalDestDescr sig0dest2;
		tSignalDescr sig1;
		tSignalDestDescr sig1dest0;
	} Frm1Sigs;
	struct { /* Frame #2 Signal Descriptor */
		tSignalDescr sig0;
		tSignalDestDescr sig0dest0;
	} Frm2Sigs;
} SignalDescrs = { /* Signal desriptors initialisation */
	{ /* Frame #0 Signal Descriptor */
		{		/* Signal #0 initialisation */
			1,	/* Signal position */
			7,	/* Signal size - 1 */
			2,	/* Number of signal destinations */
		},		/* Signal #0 end */
		{		/* Signal #0 destination #0 initialisation */
			0,	/* Frame # */
			0,	/* position */
		},		/* Signal #0 destination #0 end */
		{		/* Signal #0 destination #1 initialisation */
			1,	/* Frame # */
			15,	/* position */
		},		/* Signal #0 destination #1 end */
		{		/* Signal #1 initialisation */
			13,	/* Signal position */
			2,	/* Signal size - 1 */
			1,	/* Number of signal destinations */
		},		/* Signal #1 end */
		{		/* Signal #1 destination #0 initialisation */
			2,	/* Frame # */
			16,	/* position */
		}		/* Signal #1 destination #0 end */
	}, /* Frame #0 Signal Descriptor initialisation end */
	{ /* Frame #1 Signal Descriptor */
		{		/* Signal #0 initialisation */
			5,	/* Signal position */
			7,	/* Signal size - 1 */
			3,	/* Number of signal destinations */
		},		/* Signal #0 end */
		{		/* Signal #0 destination #0 initialisation */
			1,	/* Frame # */
			0,	/* position */
		},		/* Signal #0 destination #0 end */
		{		/* Signal #0 destination #1 initialisation */
			0,	/* Frame # */
			8,	/* position */
		},		/* Signal #0 destination #1 end */
		{		/* Signal #0 destination #2 initialisation */
			2,	/* Frame # */
			0,	/* position */
		},		/* Signal #0 destination #2 end */
		{		/* Signal #1 initialisation */
			15,	/* Signal position */
			0,	/* Signal size - 1 */
			1,	/* Number of signal destinations */
		},		/* Signal #1 end */
		{		/* Signal #1 destination #0 initialisation */
			2,	/* Frame # */
			24,	/* position */
		}		/* Signal #1 destination #0 end */
	}, /* Frame #1 Signal Descriptor initialisation end */
	{ /* Frame #2 Signal Descriptor */
		{		/* Signal #0 initialisation */
			0,	/* Signal position */
			1,	/* Signal size - 1 */
			1,	/* Number of signal destinations */
		},		/* Signal #0 end */
		{		/* Signal #0 destination #0 initialisation */
			2,	/* Frame # */
			0,	/* position */
		}		/* Signal #0 destination #0 end */
	}, /* Frame #2 Signal Descriptor initialisation end */
}; /* Signal desriptors initialisation end */

tRxFrmDescr RxTable[GATEWAY_RX_FRM_CNT]={
	{ /* Rx Frame #0 */
		0x20,	/* Rx ID */
		0x00,	/* timer_prescaller */
		&(SignalDescrs.Frm0Sigs.sig0), /* pointer to frame signal descriptors */
		8,	/* DataSize */
		2,	/* SignalCount */
		{	/* Rx Timer */
			25,	/* reload */
			25,	/* counter */
		},	/* End of Rx Timer */
		0,	/* Rx Byte copy off */
		0,	/* Fail Bit Feature Disabled */
		0,	/* Fail Bit Feature Disabled */
		0,	/* Rx Timeout counter reload */
		0,	/* Rx Timeout counter Disabled */
	}, /* Rx Frame #0 end */
	{ /* Rx Frame #1 */
		0x21,	/* Rx ID */
		0x1F,	/* timer_prescaller */
		&(SignalDescrs.Frm1Sigs.sig0), /* pointer to frame signal descriptors */
		8,	/* DataSize */
		2,	/* SignalCount */
		{	/* Rx Timer */
			50,	/* reload */
			50,	/* counter */
		},	/* End of Rx Timer */
		0,	/* Rx Byte copy off */
		1,	/* Fail Bit Feature Enabled */
		8,	/* Fail Bit position */
		2,	/* Rx Timeout counter reload */
		2,	/* Rx Timeout counter */
	}, /* Rx Frame #1 end */
	{ /* Rx Frame #2 */
		LIN_ID(0x29),	/* Rx ID */
		0x00,	/* timer_prescaller (timer inactive) */
		&(SignalDescrs.Frm2Sigs.sig0), /* pointer to frame signal descriptors */
		2,	/* DataSize */
		1,	/* SignalCount */
		{	/* Rx Timer (inactive) */
			0,	/* reload */
			0	/* counter */
		},	/* End of Rx Timer */
		1,	/* Rx Byte copy on */
		0,	/* Fail Bit Feature Disabled */
		0,	/* Fail Bit Feature Disabled */
		0,	/* Rx Timeout counter reload */
		0,	/* Rx Timeout counter Disabled */
	}, /* Rx Frame #2 end */
}; /* End of RxTable */
#endif


/* TxBuffer size definitions */
#define NODE_0_TX_BUFFER_SIZE 2
#define NODE_1_TX_BUFFER_SIZE 2
#define NODE_2_TX_BUFFER_SIZE 3
#define NODE_3_TX_BUFFER_SIZE 2
/* End of TxBuffer size definitions */

/* TxBuffers */
tTxFrmDescr* Node0TxBuffer[NODE_0_TX_BUFFER_SIZE];
tTxFrmDescr* Node1TxBuffer[NODE_1_TX_BUFFER_SIZE];
tTxFrmDescr* Node2TxBuffer[NODE_2_TX_BUFFER_SIZE];
tTxFrmDescr* Node3TxBuffer[NODE_3_TX_BUFFER_SIZE];
/* End of TxBuffers */

/* definitions of RxTable ranges for nodes */
#define NODE_0_RX_TABLE_START	0
#define NODE_0_RX_TABLE_CNT	1
#define NODE_1_RX_TABLE_START	1
#define NODE_1_RX_TABLE_CNT	1
#define NODE_2_RX_TABLE_START	2
#define NODE_2_RX_TABLE_CNT	1
#define NODE_3_RX_TABLE_START	0
#define NODE_3_RX_TABLE_CNT	0
/* end of definitions of RxTable ranges for nodes */

/* LIN node descriptors */
tLINnode LinNodeDescrs[GATEWAY_LIN_NODE_CNT]={
	{	/* Lin node #0 */
		(tSCI*)SCI1_ADDR,	/* Address of the SCI peripheral */
		0,	/* checksum */
		{0,0,0,0,0,0,0,0},	/* data */
		0,	/* Id */
		0,	/* direction */
		0,	/* Length */
		idleState,	/* state */
		XLIN_TIMER_STOP,	/* timer */
		NULL	/* pointer to Rx/Tx data */
	},
	{	/* Lin node #1 */
		(tSCI*)SCI2_ADDR,	/* Address of the SCI peripheral */
		0,	/* checksum */
		{0,0,0,0,0,0,0,0},	/* data */
		0,	/* Id */
		0,	/* direction */
		0,	/* Length */
		idleState,	/* state */
		XLIN_TIMER_STOP,	/* timer */
		NULL	/* pointer to Rx/Tx data */
	}
};

/* node descriptors */
tNodeDescr NodeDescrs[GATEWAY_NODE_CNT] = {
	{	/* node #0 */
		CAN0_ADDR,	/* periph_addr */
		#if (GATEWAY_RX_FRM_CNT>0)
			&(RxTable[NODE_0_RX_TABLE_START]),	/* rx_idx_start */
		#else
			NULL,	/* no Rx frames exist */
		#endif
		NODE_0_RX_TABLE_CNT,	/* rx_idx_cnt */
		MsCan,	/* periph_type */
		0,	/* TxBufferAdd */
		0,	/* TxBufferTake */
		NODE_0_TX_BUFFER_SIZE,	/* TxBufferSize */
		(tTxFrmDescr**)&Node0TxBuffer	/* TxBuffer */
	},	/* node #0 end */
	{	/* node #1 */
		CAN1_ADDR,	/* periph_addr */
		#if (GATEWAY_RX_FRM_CNT>0)
			&(RxTable[NODE_1_RX_TABLE_START]),	/* rx_idx_start */
		#else
			NULL,	/* no Rx frames exist */
		#endif
		NODE_1_RX_TABLE_CNT,	/* rx_idx_cnt */
		MsCan,	/* periph_type */
		0,	/* TxBufferAdd */
		0,	/* TxBufferTake */
		NODE_1_TX_BUFFER_SIZE,	/* TxBufferSize */
		(tTxFrmDescr**)&Node1TxBuffer	/* TxBuffer */
	},	/* node #1 end */
	{	/* node #2 */
		(unsigned int)&(LinNodeDescrs[0]),	/* periph_addr */
		#if (GATEWAY_RX_FRM_CNT>0)
			&(RxTable[NODE_2_RX_TABLE_START]),	/* rx_idx_start */
		#else
			NULL,	/* no Rx frames exist */
		#endif
		NODE_2_RX_TABLE_CNT,	/* rx_idx_cnt */
		Lin,	/* periph_type */
		0,	/* TxBufferAdd */
		0,	/* TxBufferTake */
		NODE_2_TX_BUFFER_SIZE,	/* TxBufferSize */
		(tTxFrmDescr**)&Node2TxBuffer	/* TxBuffer */
	},	/* node #2 end */
	{	/* node #3 */
		(unsigned int)&(LinNodeDescrs[1]),	/* periph_addr */
		#if (GATEWAY_RX_FRM_CNT>0)
			&(RxTable[NODE_3_RX_TABLE_START]),	/* rx_idx_start */
		#else
			NULL,	/* no Rx frames exist */
		#endif
		NODE_3_RX_TABLE_CNT,	/* rx_idx_cnt */
		Lin,	/* periph_type */
		0,	/* TxBufferAdd */
		0,	/* TxBufferTake */
		NODE_3_TX_BUFFER_SIZE,	/* TxBufferSize */
		(tTxFrmDescr**)&Node3TxBuffer	/* TxBuffer */
	}	/* node #3 end */
};	/* end of node descriptors */