📄 communication.s
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.dbline 343
; }
; i2c_wt_8bit(device_rd); //写I2C从器件地址及读方式
mov R16,R10
xcall _i2c_wt_8bit
.dbline 344
L164:
.dbline 344
L165:
.dbline 344
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L164
.dbline 344
.dbline 344
.dbline 345
; if(TestAck()!=TWI_MRX_ADR_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,64
breq L167
.dbline 346
; {
.dbline 347
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 348
; return 1; //出错
ldi R16,1
xjmp L138
L167:
.dbline 350
; }
; TWCR = (1<<TWEN)| // TWI Interface enabled
ldi R24,196
sts 116,R24
.dbline 354
; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
; (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
; (0<<TWWC);
; delay_nus(25); //最低值！25
ldi R16,25
ldi R17,0
xcall _delay_nus
.dbline 355
; for(j=1;j<num;j++) //读取num-1个
ldi R22,1
xjmp L172
L169:
.dbline 356
; {
.dbline 357
; if(TestAck()!= TWI_MRX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,80
breq L173
.dbline 358
; {
.dbline 359
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 360
; return 1; //出错
ldi R16,1
xjmp L138
L173:
.dbline 362
ldi R24,<_i2c_rd_buff-1
ldi R25,>_i2c_rd_buff-1
mov R30,R22
clr R31
add R30,R24
adc R31,R25
lds R2,115
std z+0,R2
.dbline 363
ldi R24,196
sts 116,R24
.dbline 367
ldi R16,25
ldi R17,0
xcall _delay_nus
.dbline 368
L170:
.dbline 355
inc R22
L172:
.dbline 355
cp R22,R20
brlo L169
.dbline 369
; }
; i2c_rd_buff[j-1]=TWDR; //读取数
; TWCR = (1<<TWEN)| // TWI Interface enabled
; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
; (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
; (0<<TWWC);
; delay_nus(25); //最低值！ 25
; }
; if(TestAck()!= TWI_MRX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,80
breq L176
.dbline 370
; {
.dbline 371
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 372
; return 1; //出错
ldi R16,1
xjmp L138
L176:
.dbline 374
; }
; i2c_rd_buff[num-1]=TWDR; //读取数
ldi R24,<_i2c_rd_buff-1
ldi R25,>_i2c_rd_buff-1
mov R30,R20
clr R31
add R30,R24
adc R31,R25
lds R2,115
std z+0,R2
.dbline 375
; TWCR = (1<<TWEN)| // TWI Interface enabled
ldi R24,132
sts 116,R24
.dbline 379
; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
; (0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send NACK after reception
; (0<<TWWC);
; delay_nus(25); //最低值！ 25
ldi R16,25
ldi R17,0
xcall _delay_nus
.dbline 380
; if(TestAck()!= TWI_MRX_DATA_NACK ) //NACK
lds R24,113
andi R24,248
cpi R24,88
breq L179
.dbline 381
; {
.dbline 382
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 383
; return 1; //出错
ldi R16,1
xjmp L138
L179:
.dbline 385
; }
; Stop(); //I2C停止
ldi R24,148
sts 116,R24
.dbline 386
; return 0; //整个过程正常时返回0
clr R16
.dbline -2
L138:
xcall pop_gset4
.dbline 0 ; func end
ret
.dbsym r j 22 c
.dbsym r num 20 c
.dbsym l addrlo 10 c
.dbsym l addrhi 8 c
.dbsym r device_rd 10 c
.dbsym r device_wt 12 c
.dbend
.dbfunc e I2cWrite _I2cWrite fc
; i -> R20
; num -> R22
; msg -> R10,R11
.even
_I2cWrite::
xcall push_gset3
mov R22,R18
movw R10,R16
.dbline -1
.dbline 391
; }
; //num ,msg写的数组 num包括前面的三个字节的地址
; //返回1：失败，0：成功
; uchar I2cWrite(uchar *msg,uchar num)
; {
.dbline 392
; uchar i=0; //一般用途
clr R20
.dbline 393
; i2c_wt_buff[0]=msg[0] ; //器件
movw R30,R10
ldd R2,z+0
sts _i2c_wt_buff,R2
.dbline 394
; i2c_wt_buff[1]=msg[1] ; // 地址高字节
ldd R2,z+1
sts _i2c_wt_buff+1,R2
.dbline 395
; i2c_wt_buff[2]=msg[2] ; // 地址低字节
movw R30,R10
ldd R2,z+2
sts _i2c_wt_buff+2,R2
.dbline 396
; for(i=3;i<num;i++)
ldi R20,3
xjmp L187
L184:
.dbline 397
mov R30,R20
clr R31
add R30,R10
adc R31,R11
ldd R2,z+0
ldi R24,<_i2c_wt_buff
ldi R25,>_i2c_wt_buff
mov R30,R20
clr R31
add R30,R24
adc R31,R25
std z+0,R2
L185:
.dbline 396
inc R20
L187:
.dbline 396
cp R20,R22
brlo L184
.dbline 398
; i2c_wt_buff[i]=msg[i]; //转移字节
; Start() ; //I2C开始
ldi R24,164
sts 116,R24
.dbline 399
L188:
.dbline 399
L189:
.dbline 399
; Wait() ; //等待TWIINT标志为1
lds R2,116
sbrs R2,7
rjmp L188
.dbline 399
.dbline 399
.dbline 400
; if(TestAck()!=TWI_START )
lds R24,113
andi R24,248
cpi R24,8
breq L191
.dbline 401
; {
.dbline 402
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 403
; return 1; //出错
ldi R16,1
xjmp L181
L191:
.dbline 405
; }
; i2c_wt_8bit(i2c_wt_buff[0]) ; //从器件地址和写方式
lds R16,_i2c_wt_buff
xcall _i2c_wt_8bit
.dbline 406
L193:
.dbline 406
L194:
.dbline 406
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L193
.dbline 406
.dbline 406
.dbline 407
; if(TestAck()!=TWI_MTX_ADR_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,24
breq L196
.dbline 408
; {
.dbline 409
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 410
; return 1; //出错
ldi R16,1
xjmp L181
L196:
.dbline 412
; }
; i2c_wt_8bit(i2c_wt_buff[1]) ; //写地址高
lds R16,_i2c_wt_buff+1
xcall _i2c_wt_8bit
.dbline 413
L199:
.dbline 413
L200:
.dbline 413
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L199
.dbline 413
.dbline 413
.dbline 414
; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,40
breq L202
.dbline 415
; {
.dbline 416
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 417
; return 1; //出错
ldi R16,1
xjmp L181
L202:
.dbline 419
; }
; i2c_wt_8bit(i2c_wt_buff[2]) ; //写地址低
lds R16,_i2c_wt_buff+2
xcall _i2c_wt_8bit
.dbline 420
L205:
.dbline 420
L206:
.dbline 420
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L205
.dbline 420
.dbline 420
.dbline 421
; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,40
breq L208
.dbline 422
; {
.dbline 423
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 424
; return 1; //出错
ldi R16,1
xjmp L181
L208:
.dbline 426
; }
; for(i=3;i<num;i++) //写真正的数据
ldi R20,3
xjmp L213
L210:
.dbline 427
; {
.dbline 428
; i2c_wt_8bit(i2c_wt_buff[i]) ; //写地址高
ldi R24,<_i2c_wt_buff
ldi R25,>_i2c_wt_buff
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R16,z+0
xcall _i2c_wt_8bit
.dbline 429
L214:
.dbline 429
L215:
.dbline 429
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L214
.dbline 429
.dbline 429
.dbline 430
; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,40
breq L217
.dbline 431
; {
.dbline 432
; TWI_Master_Initialise();
xcall _TWI_Master_Initialise
.dbline 433
; return 1; //出错
ldi R16,1
xjmp L181
L217:
.dbline 435
ldi R16,25
ldi R17,0
xcall _delay_nus
.dbline 436
L211:
.dbline 426
inc R20
L213:
.dbline 426
cp R20,R22
brlo L210
.dbline 437
; }
; delay_nus(25); //没必要
; }
; Stop(); //I2C停止
ldi R24,148
sts 116,R24
.dbline 438
; return 0; //整个过程正常时返回0
clr R16
.dbline -2
L181:
xcall pop_gset3
.dbline 0 ; func end
ret
.dbsym r i 20 c
.dbsym r num 22 c
.dbsym r msg 10 pc
.dbend
.dbfunc e clock_wt _clock_wt fc
; i -> R20
; num -> R22
; msg -> R10,R11
.even
_clock_wt::
xcall push_gset3
mov R22,R18
movw R10,R16
.dbline -1
.dbline 443
;
; }
; //时钟的读写
; uchar clock_wt(uchar *msg,uchar num)
; {
.dbline 444
; uchar i=0;
clr R20
.dbline 445
; for(i=0;i<num;i++)
xjmp L223
L220:
.dbline 446
mov R30,R20
clr R31
add R30,R10
adc R31,R11
ldd R2,z+0
ldi R24,<_i2c_wt_buff
ldi R25,>_i2c_wt_buff
mov R30,R20
clr R31
add R30,R24
adc R31,R25
std z+0,R2
L221:
.dbline 445
inc R20
L223:
.dbline 445
cp R20,R22
brlo L220
.dbline 447
; i2c_wt_buff[i]=msg[i]; //转移字节
; Start() ; //I2C开始
ldi R24,164
sts 116,R24
.dbline 448
L224:
.dbline 448
L225:
.dbline 448
; Wait() ; //等待TWIINT标志为1
lds R2,116
sbrs R2,7
rjmp L224
.dbline 448
.dbline 448
.dbline 449
; if(TestAck()!=TWI_START )
lds R24,113
andi R24,248
cpi R24,8
breq L227
.dbline 450
; {
.dbline 451
; Stop(); //I2C停止
ldi R24,148
sts 116,R24
.dbline 452
; return 1; //出错
ldi R16,1
xjmp L219
L227:
.dbline 454
; }
; i2c_wt_8bit(i2c_wt_buff[0]) ; //从器件地址和写方式
lds R16,_i2c_wt_buff
xcall _i2c_wt_8bit
.dbline 456
L229:
.dbline 456
L230:
.dbline 456
; //delay_nms(8);
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L229
.dbline 456
.dbline 456
.dbline 457
; if(TestAck()!=TWI_MTX_ADR_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,24
breq L232
.dbline 458
; return 1; //出错
ldi R16,1
xjmp L219
L232:
.dbline 459
; for(i=1;i<num;i++) //写真正的数据
ldi R20,1
xjmp L237
L234:
.dbline 460
; {
.dbline 461
; i2c_wt_8bit(i2c_wt_buff[i]) ; //写地址高
ldi R24,<_i2c_wt_buff
ldi R25,>_i2c_wt_buff
mov R30,R20
clr R31
add R30,R24
adc R31,R25
ldd R16,z+0
xcall _i2c_wt_8bit
.dbline 462
L238:
.dbline 462
L239:
.dbline 462
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L238
.dbline 462
.dbline 462
.dbline 463
; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,40
breq L241
.dbline 464
; return 1; //出错
ldi R16,1
xjmp L219
L241:
.dbline 465
ldi R16,50
ldi R17,0
xcall _delay_nms
.dbline 466
L235:
.dbline 459
inc R20
L237:
.dbline 459
cp R20,R22
brlo L234
.dbline 467
; delay_nms(50);
; }
; Stop(); //I2C停止
ldi R24,148
sts 116,R24
.dbline 468
; return 0; //整个过程正常时返回0
clr R16
.dbline -2
L219:
xcall pop_gset3
.dbline 0 ; func end
ret
.dbsym r i 20 c
.dbsym r num 22 c
.dbsym r msg 10 pc
.dbend
.dbfunc e clock_rd _clock_rd fc
; j -> R22
; num -> R20
; command -> R10
.even
_clock_rd::
xcall push_gset3
mov R20,R18
mov R10,R16
.dbline -1
.dbline 472
; }
; //时钟读
; uchar clock_rd(uchar command,uchar num)
; {
.dbline 473
; uchar j=0;
clr R22
.dbline 474
; Start() ; //I2C开始
ldi R24,164
sts 116,R24
.dbline 475
L244:
.dbline 475
L245:
.dbline 475
; Wait() ; //等待TWIINT标志为1
lds R2,116
sbrs R2,7
rjmp L244
.dbline 475
.dbline 475
.dbline 476
; if(TestAck()!=TWI_START )
lds R24,113
andi R24,248
cpi R24,8
breq L247
.dbline 477
; return 1; //出错
ldi R16,1
xjmp L243
L247:
.dbline 478
; i2c_wt_8bit(command); //写I2C从器件地址及写方式
mov R16,R10
xcall _i2c_wt_8bit
.dbline 479
L249:
.dbline 479
L250:
.dbline 479
; Wait(); //等
lds R2,116
sbrs R2,7
rjmp L249
.dbline 479
.dbline 479
.dbline 480
; if(TestAck()!=TWI_MRX_ADR_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,64
breq L252
.dbline 481
; return 1; //出错
ldi R16,1
xjmp L243
L252:
.dbline 482
; TWCR = (1<<TWEN)| // TWI Interface enabled
ldi R24,196
sts 116,R24
.dbline 486
; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
; (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
; (0<<TWWC);
; delay_nus(25); //最低值！
ldi R16,25
ldi R17,0
xcall _delay_nus
.dbline 487
; for(j=1;j<num;j++) //读取num-1个
ldi R22,1
xjmp L257
L254:
.dbline 488
; {
.dbline 489
; if(TestAck()!= TWI_MRX_DATA_ACK ) //ACK
lds R24,113
andi R24,248
cpi R24,80
breq L258
.dbline 490
; return 1; //出错
ldi R16,1
xjmp L243
L258:
.dbline 491
ldi R24,<_i2c_rd_buff-1
ldi R25,>_i2c_rd_buff-1
mov R30,R22
clr R31
add R30,R24
adc R31,R25
lds R2,115
std z+0,R2
.dbline 492
ldi R24,196
sts 116,R24
.dbline 496
ldi R16,25
ldi R17,0
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