📄 communication.lis
字号:
03D8 ; Start() ; //I2C开始
03D8 84EA ldi R24,164
03DA 80937400 sts 116,R24
03DE .dbline 309
03DE L139:
03DE .dbline 309
03DE L140:
03DE .dbline 309
03DE ; Wait() ; //等待TWIINT标志为1
03DE 20907400 lds R2,116
03E2 27FE sbrs R2,7
03E4 FCCF rjmp L139
03E6 .dbline 309
03E6 .dbline 309
03E6 .dbline 310
03E6 ; if(TestAck()!=TWI_START )
03E6 80917100 lds R24,113
03EA 887F andi R24,248
03EC 8830 cpi R24,8
03EE 19F0 breq L142
03F0 .dbline 311
03F0 ; {
03F0 .dbline 312
03F0 ; TWI_Master_Initialise();
03F0 DDDF xcall _TWI_Master_Initialise
03F2 .dbline 313
03F2 ; return 1; //出错
03F2 01E0 ldi R16,1
03F4 8CC0 xjmp L138
03F6 L142:
03F6 .dbline 315
03F6 ; }
03F6 ; i2c_wt_8bit(device_wt); //写I2C从器件地址及写方式
03F6 0C2D mov R16,R12
03F8 E3DF xcall _i2c_wt_8bit
03FA .dbline 316
03FA L144:
03FA .dbline 316
03FA L145:
03FA .dbline 316
03FA ; Wait(); //等
03FA 20907400 lds R2,116
03FE 27FE sbrs R2,7
0400 FCCF rjmp L144
0402 .dbline 316
0402 .dbline 316
0402 .dbline 317
0402 ; if(TestAck()!=TWI_MTX_ADR_ACK ) //ACK
0402 80917100 lds R24,113
0406 887F andi R24,248
0408 8831 cpi R24,24
040A 19F0 breq L147
040C .dbline 318
040C ; {
040C .dbline 319
040C ; TWI_Master_Initialise();
040C CFDF xcall _TWI_Master_Initialise
040E .dbline 320
040E ; return 1; //出错
040E 01E0 ldi R16,1
0410 7EC0 xjmp L138
0412 L147:
0412 .dbline 322
0412 ; }
0412 ; i2c_wt_8bit(addrhi); //高地址
0412 0885 ldd R16,y+8
0414 D5DF xcall _i2c_wt_8bit
0416 .dbline 323
0416 L149:
0416 .dbline 323
0416 L150:
0416 .dbline 323
0416 ; Wait(); //等
0416 20907400 lds R2,116
041A 27FE sbrs R2,7
041C FCCF rjmp L149
041E .dbline 323
041E .dbline 323
041E .dbline 324
041E ; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
041E 80917100 lds R24,113
0422 887F andi R24,248
0424 8832 cpi R24,40
0426 19F0 breq L152
0428 .dbline 325
0428 ; {
0428 .dbline 326
0428 ; TWI_Master_Initialise();
0428 C1DF xcall _TWI_Master_Initialise
042A .dbline 327
042A ; return 1; //出错
042A 01E0 ldi R16,1
042C 70C0 xjmp L138
042E L152:
042E .dbline 329
042E ; }
042E ; i2c_wt_8bit(addrlo); //低地址
042E 0A85 ldd R16,y+10
0430 C7DF xcall _i2c_wt_8bit
0432 .dbline 330
0432 L154:
0432 .dbline 330
0432 L155:
0432 .dbline 330
0432 ; Wait(); //等
0432 20907400 lds R2,116
0436 27FE sbrs R2,7
0438 FCCF rjmp L154
043A .dbline 330
043A .dbline 330
043A .dbline 331
043A ; if(TestAck()!=TWI_MTX_DATA_ACK ) //ACK
043A 80917100 lds R24,113
043E 887F andi R24,248
0440 8832 cpi R24,40
0442 19F0 breq L157
0444 .dbline 332
0444 ; {
0444 .dbline 333
0444 ; TWI_Master_Initialise();
0444 B3DF xcall _TWI_Master_Initialise
0446 .dbline 334
0446 ; return 1; //出错
0446 01E0 ldi R16,1
0448 62C0 xjmp L138
044A L157:
044A .dbline 336
044A ; }
044A ; Start() ; //I2C从新开始
044A 84EA ldi R24,164
044C 80937400 sts 116,R24
0450 .dbline 337
0450 L159:
0450 .dbline 337
0450 L160:
0450 .dbline 337
0450 ; Wait() ; //等待TWIINT标志为1
0450 20907400 lds R2,116
0454 27FE sbrs R2,7
0456 FCCF rjmp L159
0458 .dbline 337
0458 .dbline 337
0458 .dbline 338
0458 ; if(TestAck()!=TWI_REP_START ) //ACK
0458 80917100 lds R24,113
045C 887F andi R24,248
045E 8031 cpi R24,16
0460 19F0 breq L162
0462 .dbline 339
0462 ; {
0462 .dbline 340
0462 ; TWI_Master_Initialise();
0462 A4DF xcall _TWI_Master_Initialise
0464 .dbline 341
0464 ; return 1; //出错
0464 01E0 ldi R16,1
0466 53C0 xjmp L138
0468 L162:
0468 .dbline 343
0468 ; }
0468 ; i2c_wt_8bit(device_rd); //写I2C从器件地址及读方式
0468 0A2D mov R16,R10
046A AADF xcall _i2c_wt_8bit
046C .dbline 344
046C L164:
046C .dbline 344
046C L165:
046C .dbline 344
046C ; Wait(); //等
046C 20907400 lds R2,116
0470 27FE sbrs R2,7
0472 FCCF rjmp L164
0474 .dbline 344
0474 .dbline 344
0474 .dbline 345
0474 ; if(TestAck()!=TWI_MRX_ADR_ACK ) //ACK
0474 80917100 lds R24,113
0478 887F andi R24,248
047A 8034 cpi R24,64
047C 19F0 breq L167
047E .dbline 346
047E ; {
047E .dbline 347
047E ; TWI_Master_Initialise();
047E 96DF xcall _TWI_Master_Initialise
0480 .dbline 348
0480 ; return 1; //出错
0480 01E0 ldi R16,1
0482 45C0 xjmp L138
0484 L167:
0484 .dbline 350
0484 ; }
0484 ; TWCR = (1<<TWEN)| // TWI Interface enabled
0484 84EC ldi R24,196
0486 80937400 sts 116,R24
048A .dbline 354
048A ; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
048A ; (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
048A ; (0<<TWWC);
048A ; delay_nus(25); //最低值！25
048A 09E1 ldi R16,25
048C 10E0 ldi R17,0
048E BADD xcall _delay_nus
0490 .dbline 355
0490 ; for(j=1;j<num;j++) //读取num-1个
0490 61E0 ldi R22,1
0492 18C0 xjmp L172
0494 L169:
0494 .dbline 356
0494 ; {
0494 .dbline 357
0494 ; if(TestAck()!= TWI_MRX_DATA_ACK ) //ACK
0494 80917100 lds R24,113
0498 887F andi R24,248
049A 8035 cpi R24,80
049C 19F0 breq L173
049E .dbline 358
049E ; {
049E .dbline 359
049E ; TWI_Master_Initialise();
049E 86DF xcall _TWI_Master_Initialise
04A0 .dbline 360
04A0 ; return 1; //出错
04A0 01E0 ldi R16,1
04A2 35C0 xjmp L138
04A4 L173:
04A4 .dbline 362
04A4 80E0 ldi R24,<_i2c_rd_buff-1
04A6 90E0 ldi R25,>_i2c_rd_buff-1
04A8 E62F mov R30,R22
04AA FF27 clr R31
04AC E80F add R30,R24
04AE F91F adc R31,R25
04B0 20907300 lds R2,115
04B4 2082 std z+0,R2
04B6 .dbline 363
04B6 84EC ldi R24,196
04B8 80937400 sts 116,R24
04BC .dbline 367
04BC 09E1 ldi R16,25
04BE 10E0 ldi R17,0
04C0 A1DD xcall _delay_nus
04C2 .dbline 368
04C2 L170:
04C2 .dbline 355
04C2 6395 inc R22
04C4 L172:
04C4 .dbline 355
04C4 6417 cp R22,R20
04C6 30F3 brlo L169
04C8 .dbline 369
04C8 ; }
04C8 ; i2c_rd_buff[j-1]=TWDR; //读取数
04C8 ; TWCR = (1<<TWEN)| // TWI Interface enabled
04C8 ; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
04C8 ; (1<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send ACK after reception
04C8 ; (0<<TWWC);
04C8 ; delay_nus(25); //最低值！ 25
04C8 ; }
04C8 ; if(TestAck()!= TWI_MRX_DATA_ACK ) //ACK
04C8 80917100 lds R24,113
04CC 887F andi R24,248
04CE 8035 cpi R24,80
04D0 19F0 breq L176
04D2 .dbline 370
04D2 ; {
04D2 .dbline 371
04D2 ; TWI_Master_Initialise();
04D2 6CDF xcall _TWI_Master_Initialise
04D4 .dbline 372
04D4 ; return 1; //出错
04D4 01E0 ldi R16,1
04D6 1BC0 xjmp L138
04D8 L176:
04D8 .dbline 374
04D8 ; }
04D8 ; i2c_rd_buff[num-1]=TWDR; //读取数
04D8 80E0 ldi R24,<_i2c_rd_buff-1
04DA 90E0 ldi R25,>_i2c_rd_buff-1
04DC E42F mov R30,R20
04DE FF27 clr R31
04E0 E80F add R30,R24
04E2 F91F adc R31,R25
04E4 20907300 lds R2,115
04E8 2082 std z+0,R2
04EA .dbline 375
04EA ; TWCR = (1<<TWEN)| // TWI Interface enabled
04EA 84E8 ldi R24,132
04EC 80937400 sts 116,R24
04F0 .dbline 379
04F0 ; (0<<TWIE)|(1<<TWINT)| // Enable TWI Interupt and clear the flag to read next byte
04F0 ; (0<<TWEA)|(0<<TWSTA)|(0<<TWSTO)| // Send NACK after reception
04F0 ; (0<<TWWC);
04F0 ; delay_nus(25); //最低值！ 25
04F0 09E1 ldi R16,25
04F2 10E0 ldi R17,0
04F4 87DD xcall _delay_nus
04F6 .dbline 380
04F6 ; if(TestAck()!= TWI_MRX_DATA_NACK ) //NACK
04F6 80917100 lds R24,113
04FA 887F andi R24,248
04FC 8835 cpi R24,88
04FE 19F0 breq L179
0500 .dbline 381
0500 ; {
0500 .dbline 382
0500 ; TWI_Master_Initialise();
0500 55DF xcall _TWI_Master_Initialise
0502 .dbline 383
0502 ; return 1; //出错
0502 01E0 ldi R16,1
0504 04C0 xjmp L138
0506 L179:
0506 .dbline 385
0506 ; }
0506 ; Stop(); //I2C停止
0506 84E9 ldi R24,148
0508 80937400 sts 116,R24
050C .dbline 386
050C ; return 0; //整个过程正常时返⌨️ 快捷键说明
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