lpc318x.h

nxp的ARM9处理器LPC3180代码,提供了几乎所有的外设示例程序.

/* Endpoint Interrupt Registers */
#define EP_INT_STAT         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x30))
#define EP_INT_EN           (*(volatile unsigned long *)(USB_BASE_ADDR + 0x34))
#define EP_INT_CLR          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x38))
#define EP_INT_SET          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x3C))
#define EP_INT_PRIO         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x40))

/* Endpoint Realization Registers */
#define REALIZE_EP          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x44))
#define EP_INDEX            (*(volatile unsigned long *)(USB_BASE_ADDR + 0x48))
#define MAXPACKET_SIZE      (*(volatile unsigned long *)(USB_BASE_ADDR + 0x4C))

/* Command Reagisters */
#define CMD_CODE            (*(volatile unsigned long *)(USB_BASE_ADDR + 0x10))
#define CMD_DATA            (*(volatile unsigned long *)(USB_BASE_ADDR + 0x14))

/* Data Transfer Registers */
#define RX_DATA             (*(volatile unsigned long *)(USB_BASE_ADDR + 0x18))
#define TX_DATA             (*(volatile unsigned long *)(USB_BASE_ADDR + 0x1C))
#define RX_PLENGTH          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x20))
#define TX_PLENGTH          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x24))
#define USB_CTRL            (*(volatile unsigned long *)(USB_BASE_ADDR + 0x28))

/* System Register */
#define DC_REVISION         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x7C))

/* DMA Registers */
#define DMA_REQ_STAT        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x50))
#define DMA_REQ_CLR         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x54))
#define DMA_REQ_SET         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x58))
#define UDCA_HEAD           (*(volatile unsigned long *)(USB_BASE_ADDR + 0x80))
#define EP_DMA_STAT         (*(volatile unsigned long *)(USB_BASE_ADDR + 0x84))
#define EP_DMA_EN           (*(volatile unsigned long *)(USB_BASE_ADDR + 0x88))
#define EP_DMA_DIS          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x8C))
#define DMA_INT_STAT        (*(volatile unsigned long *)(USB_BASE_ADDR + 0x90))
#define DMA_INT_EN          (*(volatile unsigned long *)(USB_BASE_ADDR + 0x94))
#define EOT_INT_STAT        (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA0))
#define EOT_INT_CLR         (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA4))
#define EOT_INT_SET         (*(volatile unsigned long *)(USB_BASE_ADDR + 0xA8))
#define NDD_REQ_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0xAC))
#define NDD_REQ_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB0))
#define NDD_REQ_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB4))
#define SYS_ERR_INT_STAT    (*(volatile unsigned long *)(USB_BASE_ADDR + 0xB8))
#define SYS_ERR_INT_CLR     (*(volatile unsigned long *)(USB_BASE_ADDR + 0xBC))
#define SYS_ERR_INT_SET     (*(volatile unsigned long *)(USB_BASE_ADDR + 0xC0))
#define MODULE_ID           (*(volatile unsigned long *)(USB_BASE_ADDR + 0xFC))


/* USB Host Controller */
#define USBH_BASE_ADDR	0x31020000
#define HcRevision	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x00))
#define HcControl	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x04))
#define HcCommandStatus	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x08))
#define HcInterruptStatus	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x0C))
#define HcInterruptEnable	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x10))
#define HcInterruptDisable	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x14))
#define HcHCCA		(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x18))
#define HcPeriodCurrentED	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x1C))
#define HcControlHeadED	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x20))
#define HcControlCurrentED	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x24))
#define HcBulkHeadED	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x28))
#define HcBulkCurrentED	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x2C))
#define HcDoneHead	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x30))
#define HcFmInterval	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x34))
#define HcFmRemaining	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x38))
#define HcFmNumber	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x3C))
#define HcPeriodicStart	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x40))
#define HcLSThreshold	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x44))
#define HcRhDescriptorA	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x48))
#define HcRhDescriptorB	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x4C))
#define HcRhStatus	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x50))
#define HcRhPortStatus1	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x54))
#define HcRhPortStatus2	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x58))
#define HcModuleID	(*(volatile unsigned long *)(USBH_BASE_ADDR + 0x5C))


/* USB OTG */
#define USB_OTG_BASE_ADDR	0x31020000
#define OTG_int_status	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x100))
#define OTG_int_enable	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x104))
#define OTG_int_set	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x108))
#define OTG_int_clear	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x10C))
#define OTG_status_ctrl	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x110))
#define OTG_timer	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0x114))

/* OTG clock control registers */
#define OTG_clock_control	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0xFF4))
#define OTG_clock_status	(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0xFF8))
#define OTG_module_id		(*(volatile unsigned long *)(USB_OTG_BASE_ADDR + 0xFFC))

/* USB OTG I2C register */
#define OTG_I2C_BASE_ADDR	0x31020300
#define I2C_RX		(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x00))
#define I2C_TX		(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x00))
#define I2C_STS		(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x04))
#define I2C_CTRL	(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x08))
#define I2C_CLKH	(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x0C))
#define I2C_CLKL	(*(volatile unsigned long *)(OTG_I2C_BASE_ADDR + 0x10))


/* Universal Asynchronous Receiver Transmitter (Standard UART3,4,5,6) */
#define UART3_BASE_ADDR		0x40080000
#define U3RBR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define U3THR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define U3DLL          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define U3DLM          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04))
#define U3IER          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04))
#define U3IIR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08))
#define U3FCR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08))
#define U3LCR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C))
#define U3LSR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14))
#define U3RXLEV        (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C))

#define UART4_BASE_ADDR		0x40088000
#define U4RBR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x00))
#define U4THR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x00))
#define U4DLL          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x00))
#define U4DLM          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x04))
#define U4IER          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x04))
#define U4IIR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x08))
#define U4FCR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x08))
#define U4LCR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x0C))
#define U4LSR          (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x14))
#define U4RXLEV        (*(volatile unsigned long *)(UART4_BASE_ADDR + 0x1C))

#define UART5_BASE_ADDR		0x40090000
#define U5RBR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x00))
#define U5THR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x00))
#define U5DLL          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x00))
#define U5DLM          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x04))
#define U5IER          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x04))
#define U5IIR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x08))
#define U5FCR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x08))
#define U5LCR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x0C))
#define U5LSR          (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x14))
#define U5RXLEV        (*(volatile unsigned long *)(UART5_BASE_ADDR + 0x1C))

#define UART6_BASE_ADDR		0x40098000
#define U6RBR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x00))
#define U6THR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x00))
#define U6DLL          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x00))
#define U6DLM          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x04))
#define U6IER          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x04))
#define U6IIR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x08))
#define U6FCR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x08))
#define U6LCR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x0C))
#define U6LSR          (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x14))
#define U6RXLEV        (*(volatile unsigned long *)(UART6_BASE_ADDR + 0x1C))

#define UART_CLK_BASE_ADDR	0x40004000
#define U3CLK          (*(volatile unsigned long *)(UART_CLK_BASE_ADDR + 0xD0))
#define U4CLK          (*(volatile unsigned long *)(UART_CLK_BASE_ADDR + 0xD4))
#define U5CLK          (*(volatile unsigned long *)(UART_CLK_BASE_ADDR + 0xD8))
#define U6CLK          (*(volatile unsigned long *)(UART_CLK_BASE_ADDR + 0xDC))
#define IRDACLK        (*(volatile unsigned long *)(UART_CLK_BASE_ADDR + 0xE0))

#define UART_CTRL_BASE_ADDR	0x40054000
#define UART_CTRL      (*(volatile unsigned long *)(UART_CTRL_BASE_ADDR + 0x00))
#define UART_CLKMODE   (*(volatile unsigned long *)(UART_CTRL_BASE_ADDR + 0x04))
#define UART_LOOP      (*(volatile unsigned long *)(UART_CTRL_BASE_ADDR + 0x08))


/* High-speed Universal Asynchronous Receiver Transmitter (UART1,2,7) */
#define HS_UART1_BASE_ADDR		0x40014000
#define HSU1_RX        (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x00))
#define HSU1_TX        (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x00))
#define HSU1_LEVEL     (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x04))
#define HSU1_IIR       (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x08))
#define HSU1_CTRL      (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x0C))
#define HSU1_RATE      (*(volatile unsigned long *)(HS_UART1_BASE_ADDR + 0x10))

#define HS_UART2_BASE_ADDR		0x40018000
#define HSU2_RX        (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x00))
#define HSU2_TX        (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x00))
#define HSU2_LEVEL     (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x04))
#define HSU2_IIR       (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x08))
#define HSU2_CTRL      (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x0C))
#define HSU2_RATE      (*(volatile unsigned long *)(HS_UART2_BASE_ADDR + 0x10))

#define HS_UART7_BASE_ADDR		0x4001C000
#define HSU7_RX        (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x00))
#define HSU7_TX        (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x00))
#define HSU7_LEVEL     (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x04))
#define HSU7_IIR       (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x08))
#define HSU7_CTRL      (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x0C))
#define HSU7_RATE      (*(volatile unsigned long *)(HS_UART7_BASE_ADDR + 0x10))


/* SPI Interface */
#define SPI1_BASE_ADDR	0x20088000
#define SPI1_GLOBAL	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x000))
#define SPI1_CON	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x004))
#define SPI1_FRM	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x008))
#define SPI1_IER	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x00C))
#define SPI1_STAT	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x010))
#define SPI1_DAT	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x014))
#define SPI1_TIM_CTRL	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x400))
#define SPI1_TIM_COUNT	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x404))
#define SPI1_TIM_STAT	(*(volatile unsigned long *)(SPI1_BASE_ADDR + 0x408))

#define SPI2_BASE_ADDR	0x20090000