at91drivers.s

基于ARM7微控制器AT91X40开发板的定时器程序

 1000260:	e59430c4 	ldr	r3, [r4, #196]
 1000264:	e20330fc 	and	r3, r3, #252	; 0xfc
  		v|=0x01;
 1000268:	e3833001 	orr	r3, r3, #1	; 0x1
  		break;
 100026c:	ea000009 	b	1000298 <at91_set_timer+0xac>
  	case 1: 
  		v=tt->bmr&0xf3;
 1000270:	e59430c4 	ldr	r3, [r4, #196]
 1000274:	e20330f3 	and	r3, r3, #243	; 0xf3
  		v|=0x04;
 1000278:	e3833004 	orr	r3, r3, #4	; 0x4
  		break;
 100027c:	ea000005 	b	1000298 <at91_set_timer+0xac>
  	case 2: 
  		v=tt->bmr&0xcf;
 1000280:	e59430c4 	ldr	r3, [r4, #196]
 1000284:	e20330cf 	and	r3, r3, #207	; 0xcf
  		v|=0x10;
 1000288:	e3833010 	orr	r3, r3, #16	; 0x10
  		break; 
 100028c:	ea000001 	b	1000298 <at91_set_timer+0xac>
  	default:
  		return -1; 		  		
 1000290:	e3e00000 	mvn	r0, #0	; 0x0
 1000294:	ea000014 	b	10002ec <at91_set_timer+0x100>
  }
  tt->bmr=v;
  tc->ccr=2;
  tc->cmr=3 | (1<<14);
 1000298:	e3a02901 	mov	r2, #16384	; 0x4000
 100029c:	e58430c4 	str	r3, [r4, #196]
 10002a0:	e3a03002 	mov	r3, #2	; 0x2
 10002a4:	e5853000 	str	r3, [r5]
 10002a8:	e2822003 	add	r2, r2, #3	; 0x3
 10002ac:	e5852004 	str	r2, [r5, #4]
  tc->idr=~0ul;
 10002b0:	e2433003 	sub	r3, r3, #3	; 0x3
 10002b4:	e5853028 	str	r3, [r5, #40]
  tc->rc=param.CycleTime;
 10002b8:	e51b201c 	ldr	r2, [r11, -#28]
 10002bc:	e585201c 	str	r2, [r5, #28]
  tc->ier=1<<4;
 10002c0:	e2833011 	add	r3, r3, #17	; 0x11
 10002c4:	e5853024 	str	r3, [r5, #36]
  tc->ccr=0x05;
 10002c8:	e3a02005 	mov	r2, #5	; 0x5
 10002cc:	e5852000 	str	r2, [r5]
  at91_mask_ack_irq(param.TimerNum+4);
 10002d0:	e51b0020 	ldr	r0, [r11, -#32]
 10002d4:	e2800004 	add	r0, r0, #4	; 0x4
 10002d8:	ebffff6c 	bl	1000090 <at91_mask_ack_irq>
  at91_unmask_irq(param.TimerNum+4); 
 10002dc:	e51b0020 	ldr	r0, [r11, -#32]
 10002e0:	e2800004 	add	r0, r0, #4	; 0x4
 10002e4:	ebffff60 	bl	100006c <at91_unmask_irq>
  return 1; 
 10002e8:	e3a00001 	mov	r0, #1	; 0x1
} 10002ec:	e91ba830 	ldmdb	r11, {r4, r5, r11, sp, pc}

010002f0 <at91_install_irqhandler>:
 10002f0:	e1a0c00d 	mov	r12, sp
 10002f4:	e92dd800 	stmdb	sp!, {r11, r12, lr, pc}
 10002f8:	e24cb004 	sub	r11, r12, #4	; 0x4
extern unsigned long svr[32];

void at91_install_irqhandler(void *isr)
{
  unsigned int *irq_vec_addr = (unsigned int*)0x18;
 10002fc:	e3a03018 	mov	r3, #24	; 0x18
  unsigned int *isr_entry_addr = (unsigned int*)0x38;
  unsigned int instruction;

  *isr_entry_addr=(unsigned int)isr;
  instruction=((unsigned int)isr_entry_addr-(unsigned int)irq_vec_addr-0x08)|0xe59ff000;
 1000300:	e38324e5 	orr	r2, r3, #-452984832	; 0xe5000000
 1000304:	e382289f 	orr	r2, r2, #10420224	; 0x9f0000
 1000308:	e3a01038 	mov	r1, #56	; 0x38
 100030c:	e5810000 	str	r0, [r1]
 1000310:	e3822a0f 	orr	r2, r2, #61440	; 0xf000
  *irq_vec_addr = instruction;
 1000314:	e5832000 	str	r2, [r3]
}
 1000318:	e91ba800 	ldmdb	r11, {r11, sp, pc}

0100031c <do_irq>:
 100031c:	e1a0c00d 	mov	r12, sp
 1000320:	e92dd810 	stmdb	sp!, {r4, r11, r12, lr, pc}
 1000324:	e24cb004 	sub	r11, r12, #4	; 0x4

void do_irq(void)
{
  unsigned int irq_num=0;
  void (*isr)(void);
 
label_again:
  irq_num=*(volatile unsigned int  *)AIC_IVR;
 1000328:	e3a03322 	mov	r3, #-2013265920	; 0x88000000
 100032c:	e1a039c3 	mov	r3, r3, asr #19
 1000330:	e5934000 	ldr	r4, [r3]
  if(irq_num!=0)
 1000334:	e3540000 	cmp	r4, #0	; 0x0
 1000338:	091ba810 	ldmeqdb	r11, {r4, r11, sp, pc}
  {
    at91_mask_irq(irq_num);
 100033c:	e1a00004 	mov	r0, r4
 1000340:	ebffff41 	bl	100004c <at91_mask_irq>
    isr=(void*)svr[irq_num];
 1000344:	e59f3024 	ldr	r3, [pc, #24]	; 1000370 <do_irq+0x54>
 1000348:	e7933104 	ldr	r3, [r3, r4, lsl #2]
    if(isr!=0) isr();
 100034c:	e3530000 	cmp	r3, #0	; 0x0
 1000350:	0a000001 	beq	100035c <do_irq+0x40>
 1000354:	e1a0e00f 	mov	lr, pc
 1000358:	e1a0f003 	mov	pc, r3
    at91_unmask_irq(irq_num);
 100035c:	e1a00004 	mov	r0, r4
 1000360:	ebffff41 	bl	100006c <at91_unmask_irq>
    *(volatile unsigned int  *)AIC_EOICR=irq_num;
 1000364:	e3e03d3b 	mvn	r3, #3776	; 0xec0
 1000368:	e503400f 	str	r4, [r3, -#15]
    goto label_again;
 100036c:	eaffffed 	b	1000328 <do_irq+0xc>
 1000370:	01004038 	tsteq	r0, r8, lsr r0

01000374 <at91_init>:
   }
}
 1000374:	e1a0c00d 	mov	r12, sp
 1000378:	e92dd800 	stmdb	sp!, {r11, r12, lr, pc}
 100037c:	e24cb004 	sub	r11, r12, #4	; 0x4

void at91_init(void *isr)
{
	at91_install_irqhandler(isr);
 1000380:	ebffffda 	bl	10002f0 <at91_install_irqhandler>
	at91_init_aic();
 1000384:	ebffff68 	bl	100012c <at91_init_aic>
 1000388:	e91ba800 	ldmdb	r11, {r11, sp, pc}

0100038c <usart_init>:
 100038c:	e1a0c00d 	mov	r12, sp
 1000390:	e92dd800 	stmdb	sp!, {r11, r12, lr, pc}

static void usart_init(volatile struct at91_usarts *uart)
{
	/* Reset the USART */
	uart->cr = US_TXDIS | US_RXDIS | US_RSTTX | US_RSTRX;
 1000394:	e3a030ac 	mov	r3, #172	; 0xac
 1000398:	e5803000 	str	r3, [r0]

	uart->rcr = 0;
 100039c:	e3a01000 	mov	r1, #0	; 0x0
 10003a0:	e5801034 	str	r1, [r0, #52]
	uart->tcr = 0;
	/* Set the serial port into a safe sane state */
	uart->mr = US_USMODE(0) | US_USCLKS(0) | US_CHRL(3) | US_NBSTOP(0) | US_PAR(5) | US_SYNC(0) | US_CLKO | US_CHMODE(0);
 10003a4:	e3a03701 	mov	r3, #262144	; 0x40000
 10003a8:	e580103c 	str	r1, [r0, #60]
 10003ac:	e2833d2b 	add	r3, r3, #2752	; 0xac0
 10003b0:	e5803004 	str	r3, [r0, #4]

	uart->brgr = 213;//calc_CD(9600);//baudrate=MCK/(16*brgr) (mr over=0) OR baudrate=MCK/(8*brgr) (mr over=1)
 10003b4:	e3a020d5 	mov	r2, #213	; 0xd5
 10003b8:	e5802020 	str	r2, [r0, #32]

	uart->rtor = 20;			     // timeout = value * 4 *bit period
 10003bc:	e3a03014 	mov	r3, #20	; 0x14
 10003c0:	e5803024 	str	r3, [r0, #36]
	uart->ttgr = 0;				     // no guard time
 10003c4:	e5801028 	str	r1, [r0, #40]
	uart->rcr = 0;
 10003c8:	e5801034 	str	r1, [r0, #52]
	uart->rpr = 0;
 10003cc:	e5801030 	str	r1, [r0, #48]
	uart->tcr = 0;
 10003d0:	e580103c 	str	r1, [r0, #60]
 10003d4:	e24cb004 	sub	r11, r12, #4	; 0x4
	uart->tpr = 0;
 10003d8:	e5801038 	str	r1, [r0, #56]
 10003dc:	e91ba800 	ldmdb	r11, {r11, sp, pc}

010003e0 <at91_init_usart>:
 10003e0:	e1a0c00d 	mov	r12, sp
 10003e4:	e92dd800 	stmdb	sp!, {r11, r12, lr, pc}
}

void at91_init_usart(void)
{
	usart_init(usarts[0]);
 10003e8:	e59f300c 	ldr	r3, [pc, #c]	; 10003fc <at91_init_usart+0x1c>
 10003ec:	e5930000 	ldr	r0, [r3]
 10003f0:	e24cb004 	sub	r11, r12, #4	; 0x4
 10003f4:	ebffffe4 	bl	100038c <usart_init>
 10003f8:	e91ba800 	ldmdb	r11, {r11, sp, pc}
 10003fc:	01004028 	tsteq	r0, r8, lsr #32

01000400 <usart_printf>:
 1000400:	e1a0c00d 	mov	r12, sp
 1000404:	e92dd800 	stmdb	sp!, {r11, r12, lr, pc}
 1000408:	e24cb004 	sub	r11, r12, #4	; 0x4
}

static void usart_printf(volatile struct at91_usarts *uart, char p)
{
 100040c:	e20110ff 	and	r1, r1, #255	; 0xff
	uart->thr = p;
 1000410:	e580101c 	str	r1, [r0, #28]
 1000414:	e91ba800 	ldmdb	r11, {r11, sp, pc}

01000418 <printf>:
 1000418:	e1a0c00d 	mov	r12, sp
 100041c:	e92dd830 	stmdb	sp!, {r4, r5, r11, r12, lr, pc}
}

int printf(char *p)
{
 1000420:	e1a04000 	mov	r4, r0
	if(*p=='\0') return -1;
 1000424:	e5d43000 	ldrb	r3, [r4]
 1000428:	e24cb004 	sub	r11, r12, #4	; 0x4
 100042c:	e3530000 	cmp	r3, #0	; 0x0
 1000430:	03e00000 	mvneq	r0, #0	; 0x0
 1000434:	091ba830 	ldmeqdb	r11, {r4, r5, r11, sp, pc}
 1000438:	e59f501c 	ldr	r5, [pc, #1c]	; 100045c <printf+0x44>
	while(*p!='\0')		usart_printf(usarts[0],*p++);
 100043c:	e5950000 	ldr	r0, [r5]
 1000440:	e5d41000 	ldrb	r1, [r4]
 1000444:	ebffffed 	bl	1000400 <usart_printf>
 1000448:	e5f43001 	ldrb	r3, [r4, #1]!
 100044c:	e3530000 	cmp	r3, #0	; 0x0
 1000450:	1afffff9 	bne	100043c <printf+0x24>

	return 1;
 1000454:	e3a00001 	mov	r0, #1	; 0x1
 1000458:	e91ba830 	ldmdb	r11, {r4, r5, r11, sp, pc}
 100045c:	01004028 	tsteq	r0, r8, lsr #32

01000460 <deal_TimerIrq>:
 1000460:	e1a0c00d 	mov	r12, sp
 1000464:	e92dd810 	stmdb	sp!, {r4, r11, r12, lr, pc}
	 register volatile struct at91_timers* tt=(struct at91_timers *)(AT91_TC_BASE);	
	 register volatile struct at91_timer_channel* tc = &tt->chans[1].ch;	
	 static int cnt = 0;
   unsigned long tmp;
 	 cnt++;
 1000468:	e59f2048 	ldr	r2, [pc, #48]	; 10004b8 <deal_TimerIrq+0x58>
 100046c:	e5921000 	ldr	r1, [r2]
 1000470:	e24cb004 	sub	r11, r12, #4	; 0x4
 	
 	if((cnt % 1000)==0)
 1000474:	e59f3040 	ldr	r3, [pc, #40]	; 10004bc <deal_TimerIrq+0x5c>
 1000478:	e2811001 	add	r1, r1, #1	; 0x1
 100047c:	e0c0c193 	smull	r12, r0, r3, r1
 1000480:	e3a04040 	mov	r4, #64	; 0x40
 1000484:	e28444ff 	add	r4, r4, #-16777216	; 0xff000000
 1000488:	e28448fe 	add	r4, r4, #16646144	; 0xfe0000
 100048c:	e1a03fc1 	mov	r3, r1, asr #31
 1000490:	e5821000 	str	r1, [r2]
 1000494:	e0633340 	rsb	r3, r3, r0, asr #6
 1000498:	e0632283 	rsb	r2, r3, r3, lsl #5
 100049c:	e0833102 	add	r3, r3, r2, lsl #2
 10004a0:	e1510183 	cmp	r1, r3, lsl #3
 10004a4:	1a000001 	bne	10004b0 <deal_TimerIrq+0x50>
 		{ 
 			printf("Irq1");
 10004a8:	e59f0010 	ldr	r0, [pc, #10]	; 10004c0 <deal_TimerIrq+0x60>
 10004ac:	ebffffd9 	bl	1000418 <printf>
 		}
 		
   tmp=tc->sr;		
 10004b0:	e5943020 	ldr	r3, [r4, #32]
   return;
}
 10004b4:	e91ba810 	ldmdb	r11, {r4, r11, sp, pc}
 10004b8:	01004030 	tsteq	r0, r0, lsr r0
 10004bc:	10624dd3 	strnesb	r4, [r2], -#211
 10004c0:	01000580 	tsteq	r0, r0, lsl #11

010004c4 <maintest>:
 10004c4:	e1a0c00d 	mov	r12, sp
 10004c8:	e92dd810 	stmdb	sp!, {r4, r11, r12, lr, pc}
 10004cc:	e24cb004 	sub	r11, r12, #4	; 0x4
 10004d0:	e24dd00c 	sub	sp, sp, #12	; 0xc

void maintest(void)
{  
	static int count = 1;
  at91_timer_param param;

  at91_init_usart();
 10004d4:	ebffffc1 	bl	10003e0 <at91_init_usart>
  
  at91_init(irq_handler);  
 10004d8:	e59f0084 	ldr	r0, [pc, #84]	; 1000564 <maintest+0xa0>
 10004dc:	ebffffa4 	bl	1000374 <at91_init>
  
  param.TimerNum = KERNEL_TIMER;
 10004e0:	e3a03001 	mov	r3, #1	; 0x1
 10004e4:	e50b301c 	str	r3, [r11, -#28]
  
  param.CycleTime = 60;
  
  param.irq_svr = (void*)deal_TimerIrq;
 10004e8:	e59f1078 	ldr	r1, [pc, #78]	; 1000568 <maintest+0xa4>
 10004ec:	e3a0203c 	mov	r2, #60	; 0x3c
 10004f0:	e50b2018 	str	r2, [r11, -#24]
 10004f4:	e50b1014 	str	r1, [r11, -#20]
  
  at91_set_timer(param);
 10004f8:	e24b301c 	sub	r3, r11, #28	; 0x1c
 10004fc:	e8930007 	ldmia	r3, {r0, r1, r2}
 1000500:	ebffff39 	bl	10001ec <at91_set_timer>

  while(count++) 
 1000504:	e59f0060 	ldr	r0, [pc, #60]	; 100056c <maintest+0xa8>
 1000508:	e5903000 	ldr	r3, [r0]
 100050c:	e2833001 	add	r3, r3, #1	; 0x1
 1000510:	e3530001 	cmp	r3, #1	; 0x1
 1000514:	e5803000 	str	r3, [r0]
 1000518:	0a000017 	beq	100057c <maintest+0xb8>
 100051c:	e1a04000 	mov	r4, r0
     if ((count%10000)== 0)
 1000520:	e5940000 	ldr	r0, [r4]
 1000524:	e59f2044 	ldr	r2, [pc, #44]	; 1000570 <maintest+0xac>
 1000528:	e0c13092 	smull	r3, r1, r2, r0
 100052c:	e1a03fc0 	mov	r3, r0, asr #31
 1000530:	e0633641 	rsb	r3, r3, r1, asr #12
 1000534:	e0632283 	rsb	r2, r3, r3, lsl #5
 1000538:	e0833102 	add	r3, r3, r2, lsl #2
 100053c:	e0833103 	add	r3, r3, r3, lsl #2
 1000540:	e1500203 	cmp	r0, r3, lsl #4
 1000544:	1a000001 	bne	1000550 <maintest+0x8c>
     {
      printf("main");
 1000548:	e59f0024 	ldr	r0, [pc, #24]	; 1000574 <maintest+0xb0>
 100054c:	ebffffb1 	bl	1000418 <printf>
     }
 1000550:	e5943000 	ldr	r3, [r4]
 1000554:	e2833001 	add	r3, r3, #1	; 0x1
 1000558:	e3530001 	cmp	r3, #1	; 0x1
 100055c:	e5843000 	str	r3, [r4]
 1000560:	ea000004 	b	1000578 <maintest+0xb4>
 1000564:	01000024 	tsteq	r0, r4, lsr #32
 1000568:	01000460 	tsteq	r0, r0, ror #8
 100056c:	01004034 	tsteq	r0, r4, lsr r0
 1000570:	68db8bad 	ldmvsia	r11, {r0, r2, r3, r5, r7, r8, r9, r11, pc}^
 1000574:	01000588 	tsteq	r0, r8, lsl #11
 1000578:	1affffe8 	bne	1000520 <maintest+0x5c>
  return ;
}
 100057c:	e91ba810 	ldmdb	r11, {r4, r11, sp, pc}
 1000580:	31717249 	cmncc	r1, r9, asr #4
 1000584:	00000000 	andeq	r0, r0, r0
 1000588:	6e69616d 	powvsez	f6, f1, #5.0
 100058c:	00000000 	andeq	r0, r0, r0