dled.qsf

使用VerilogHDL语言实现硬件的开发模拟

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		dled_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:02:29  MAY 25, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VERILOG_FILE dled.v
set_global_assignment -name VECTOR_WAVEFORM_FILE dled.vwf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_83 -to clock
set_location_assignment PIN_40 -to seg[0]
set_location_assignment PIN_41 -to seg[1]
set_location_assignment PIN_44 -to seg[2]
set_location_assignment PIN_45 -to seg[3]
set_location_assignment PIN_46 -to seg[4]
set_location_assignment PIN_48 -to seg[5]
set_location_assignment PIN_49 -to seg[6]
set_location_assignment PIN_50 -to seg[7]
set_location_assignment PIN_51 -to sl[0]
set_location_assignment PIN_52 -to sl[1]
set_location_assignment PIN_54 -to sl[2]
set_location_assignment PIN_55 -to sl[3]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 84
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 15
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name TOP_LEVEL_ENTITY dled

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM7128SLC84-15"

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE FUNCTIONAL
set_global_assignment -name VECTOR_INPUT_SOURCE dled.vwf