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📄 main.c.bak

📁 ARM9的串口开发实例
💻 BAK
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#include <stdarg.h>
#include <stdlib.h>
#include <string.h>
#define WrUTXH0(ch) (*(volatile unsigned char *)0x50000020)=(unsigned char)(ch)
#define		Baud		115200		//串口波特率
//#define		Baud		9600		//串口波特率
#define	 SYS_PCLK       200000000   //200M

// UART
#define rULCON0     (*(volatile unsigned *)0x50000000) //UART 0 Line control
#define rUCON0      (*(volatile unsigned *)0x50000004) //UART 0 Control
#define rUFCON0     (*(volatile unsigned *)0x50000008) //UART 0 FIFO control
#define rUMCON0     (*(volatile unsigned *)0x5000000c) //UART 0 Modem control
#define rUTRSTAT0   (*(volatile unsigned *)0x50000010) //UART 0 Tx/Rx status
#define rUERSTAT0   (*(volatile unsigned *)0x50000014) //UART 0 Rx error status
#define rUFSTAT0    (*(volatile unsigned *)0x50000018) //UART 0 FIFO status
#define rUMSTAT0    (*(volatile unsigned *)0x5000001c) //UART 0 Modem status
#define rUBRDIV0    (*(volatile unsigned *)0x50000028) //UART 0 Baud rate divisor

#define rULCON1     (*(volatile unsigned *)0x50004000) //UART 1 Line control
#define rUCON1      (*(volatile unsigned *)0x50004004) //UART 1 Control
#define rUFCON1     (*(volatile unsigned *)0x50004008) //UART 1 FIFO control
#define rUMCON1     (*(volatile unsigned *)0x5000400c) //UART 1 Modem control
#define rUTRSTAT1   (*(volatile unsigned *)0x50004010) //UART 1 Tx/Rx status
#define rUERSTAT1   (*(volatile unsigned *)0x50004014) //UART 1 Rx error status
#define rUFSTAT1    (*(volatile unsigned *)0x50004018) //UART 1 FIFO status
#define rUMSTAT1    (*(volatile unsigned *)0x5000401c) //UART 1 Modem status
#define rUBRDIV1    (*(volatile unsigned *)0x50004028) //UART 1 Baud rate divisor

#define rULCON2     (*(volatile unsigned *)0x50008000) //UART 2 Line control
#define rUCON2      (*(volatile unsigned *)0x50008004) //UART 2 Control
#define rUFCON2     (*(volatile unsigned *)0x50008008) //UART 2 FIFO control
#define rUMCON2     (*(volatile unsigned *)0x5000800c) //UART 2 Modem control
#define rUTRSTAT2   (*(volatile unsigned *)0x50008010) //UART 2 Tx/Rx status
#define rUERSTAT2   (*(volatile unsigned *)0x50008014) //UART 2 Rx error status
#define rUFSTAT2    (*(volatile unsigned *)0x50008018) //UART 2 FIFO status
#define rUMSTAT2    (*(volatile unsigned *)0x5000801c) //UART 2 Modem status
#define rUBRDIV2    (*(volatile unsigned *)0x50008028) //



static int whichUart=0;


 
//extern unsigned int SYS_FCLK, SYS_HCLK, SYS_PCLK;
//static unsigned int sCLKDIVN;
#define rCLKDIVN    (*(volatile unsigned *)0x4c000014) //Clock divider control

void Uart_Init(int pclk,int baud)
{
    int i;    

    if(pclk == 0) pclk = SYS_PCLK;
//	pclk    = PCLK;    
    rUFCON0 = 0x0;   //UART channel 0 FIFO control register, FIFO disable
    rUFCON1 = 0x0;   //UART channel 1 FIFO control register, FIFO disable
    rUFCON2 = 0x0;   //UART channel 2 FIFO control register, FIFO disable
    rUMCON0 = 0x0;   //UART chaneel 0 MODEM control register, AFC disable
    rUMCON1 = 0x0;   //UART chaneel 1 MODEM control register, AFC disable
//UART0
    rULCON0 = 0x3;   //Line control register : Normal,No parity,1 stop,8 bits
     //    [10]       [9]     [8]        [7]        [6]      [5]         [4]           [3:2]        [1:0]
     // Clock Sel,  Tx Int,  Rx Int, Rx Time Out, Rx err, Loop-back, Send break,  Transmit Mode, Receive Mode
     //     0          1       0    ,     0          1        0           0     ,       01          01
     //   PCLK       Level    Pulse    Disable    Generate  Normal      Normal        Interrupt or Polling
    rUCON0  = 0x245;   // Control register
    rUBRDIV0=( (int)(pclk/16./baud+0.5) -1 );   //Baud rate divisior register 0
/*
//UART1
    rULCON1 = 0x3;
    rUCON1  = 0x245;
    rUBRDIV1=( (int)(pclk/16./baud) -1 );
//UART2
    rULCON2 = 0x3;
    rUCON2  = 0x245;
    rUBRDIV2=( (int)(pclk/16./baud) -1 ); 
 */   

    for(i=0;i<100;i++);
}

void Uart_Select(int ch)
{
    whichUart = ch;
}


void putch(int data)
{
    if(whichUart==0)
    {
        if(data=='\n')
        {
            while(!(rUTRSTAT0 & 0x2));
                           //because the slow response of hyper_terminal 
            WrUTXH0('\r');
        }
        while(!(rUTRSTAT0 & 0x2));   //Wait until THR is empty.
       
        WrUTXH0(data);
    }
 }
void puts(char *pt)
{
    while(*pt)
        putch(*pt++);
}

typedef int *__va_list[1];
int vsprintf(char * /*s*/, const char * /*format*/, __va_list /*arg*/);
void Uart_Printf(char *fmt,...)
{
    va_list ap;
    char string1[100];

    va_start(ap,fmt);
    vsprintf(string1,fmt,ap);
    puts(string1);
    va_end(ap);
}




/*static void SetHclkPclk()
{
	if(sCLKDIVN&2)
		SYS_HCLK = SYS_FCLK>>1;
	else
		SYS_HCLK = SYS_FCLK;
	
	if(sCLKDIVN&1)
		SYS_PCLK = SYS_HCLK>>1;
	else
		SYS_PCLK = SYS_HCLK;
}

void SetClockDivider(int hdivn, int pdivn)
{
     // hdivn,pdivn FCLK:HCLK:PCLK
     //     0,0         1:1:1 
     //     0,1         1:1:2 
     //     1,0         1:2:2
     //     1,1         1:2:4
   // if(SlowMode)
   // 	return;
     
	hdivn &= 1;
	pdivn &= 1;
	sCLKDIVN = (hdivn<<1)|pdivn;
	rCLKDIVN = sCLKDIVN;

   // if(hdivn)
   //     MMU_SetAsyncBusMode();
   // else 
   //     MMU_SetFastBusMode();
        
	SetHclkPclk();
}*/



void Main()
{
Uart_Select(0);
Uart_Init(0,Baud);

Uart_Printf("anhuiuniversity");
Uart_Printf("anhuiuniversity");

}

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