cantofddi.mfd

来自「RS232-光纤的CPLD调制解调源程序」· MFD 代码 · 共 284 行

MFD
284 行
字号 
MDF Database:  version 1.0
MDF_INFO | CANtoFDDI | XC9536-10-VQ44
MACROCELL | 0 | 9 | cTX_DataN<0>
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 6 | 0 | 15 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 5 | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>
INPUTMC | 4 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12
INPUTP | 1 | 28
EQ | 5 | 
   cTX_DataN<0>.T = !cTX_DataN<1> & fBit_Value & !FDDI_RX & 
	fBit_Bit<0> & fBit_Bit<1>
	# !cTX_DataN<1> & !fBit_Value & FDDI_RX & 
	fBit_Bit<0> & fBit_Bit<1>;
   !cTX_DataN<0>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 15 | cTX_DataN<1>
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 7 | 0 | 9 | 0 | 15 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 9 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<0>  | cTX_Data<1>  | cTX_Data<3>
INPUTMC | 8 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10
INPUTP | 1 | 28
EQ | 11 | 
   cTX_DataN<1>.T = cTX_DataN<0> & !cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1>
	# cTX_DataN<0> & !cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1>
	# !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0> & 
	cTX_Data<1> & !cTX_Data<3>
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & 
	!cTX_Data<1> & !cTX_Data<3>;
   !cTX_DataN<1>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 5 | fTX_Over
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 5 | 0 | 5 | 0 | 6 | 0 | 11 | 1 | 15 | 0 | 14
INPUTS | 3 | fTX_Over  | fTX_N  | fTX_Start
INPUTMC | 3 | 0 | 5 | 0 | 6 | 0 | 2
EQ | 2 | 
   !fTX_Over.D = fTX_Over & fTX_N;
   fTX_Over.CLK = !fTX_Start;

MACROCELL | 0 | 2 | fTX_Start
ATTRIBUTES | 4358916 | 0
OUTPUTMC | 5 | 0 | 5 | 0 | 6 | 0 | 11 | 1 | 15 | 0 | 14
INPUTS | 4 | fTX_CLK<0>  | fTX_CLK<1>  | fTX_CLK<2>  | fTX_CLK<3>
INPUTMC | 4 | 0 | 3 | 1 | 17 | 1 | 16 | 1 | 14
EQ | 3 | 
   !fTX_Start.T = !fTX_CLK<0> & !fTX_CLK<1> & !fTX_CLK<2> & 
	!fTX_CLK<3>;
   !fTX_Start.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 4 | fBit_Value
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 9 | 0 | 9 | 0 | 15 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 1 | FDDI_RX
INPUTP | 1 | 28
EQ | 2 | 
   fBit_Value.D = !FDDI_RX;
   !fBit_Value.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 7 | fBit_Bit<0>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 9 | 0 | 9 | 0 | 15 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 3 | fBit_Value  | FDDI_RX  | fBit_Bit<0>
INPUTMC | 2 | 0 | 4 | 0 | 7
INPUTP | 1 | 28
EQ | 3 | 
   !fBit_Bit<0>.D = fBit_Value & !FDDI_RX & fBit_Bit<0>
	# !fBit_Value & FDDI_RX & fBit_Bit<0>;
   !fBit_Bit<0>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 12 | fBit_Bit<1>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 8 | 0 | 9 | 0 | 15 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 4 | fBit_Bit<0>  | fBit_Bit<1>  | fBit_Value  | FDDI_RX
INPUTMC | 3 | 0 | 7 | 0 | 12 | 0 | 4
INPUTP | 1 | 28
EQ | 6 | 
   !fBit_Bit<1>.D = !fBit_Bit<0> & !fBit_Bit<1>
	# fBit_Value & !FDDI_RX & fBit_Bit<0> & 
	fBit_Bit<1>
	# !fBit_Value & FDDI_RX & fBit_Bit<0> & 
	fBit_Bit<1>;
   !fBit_Bit<1>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 3 | fTX_CLK<0>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 2 | 0 | 2 | 0 | 3
INPUTS | 4 | fTX_CLK<0>  | fTX_CLK<1>  | fTX_CLK<2>  | fTX_CLK<3>
INPUTMC | 4 | 0 | 3 | 1 | 17 | 1 | 16 | 1 | 14
EQ | 3 | 
   fTX_CLK<0>.D = !fTX_CLK<0> & !fTX_CLK<1> & !fTX_CLK<2> & 
	!fTX_CLK<3>;
   !fTX_CLK<0>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 1 | 17 | fTX_CLK<1>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 2 | 0 | 2 | 0 | 3
INPUTS | 0
EQ | 2 | 
   fTX_CLK<1>.D = Gnd;
   !fTX_CLK<1>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 1 | 16 | fTX_CLK<2>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 2 | 0 | 2 | 0 | 3
INPUTS | 0
EQ | 2 | 
   fTX_CLK<2>.D = Gnd;
   !fTX_CLK<2>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 17 | cTX_Data<0>
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 5 | 0 | 15 | 0 | 17 | 0 | 8 | 0 | 13 | 0 | 16
INPUTS | 10 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<0>  | cTX_Data<1>  | cTX_Data<3>  | cTX_Data<1>.EXP
INPUTMC | 9 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 16
INPUTP | 1 | 28
IMPORTS | 1 | 0 | 16
EQ | 18 | 
   cTX_Data<0>.T = !cTX_DataN<0> & !cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0>
	# !cTX_DataN<0> & !cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0>
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0> & 
	cTX_Data<1>
	# !cTX_DataN<0> & fBit_Value & !FDDI_RX & 
	fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0> & cTX_Data<1> & 
	cTX_Data<3>
	# !cTX_DataN<0> & !fBit_Value & FDDI_RX & 
	fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & !cTX_Data<1> & 
	cTX_Data<3>
;Imported pterms FB1_17
	# !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & 
	!cTX_Data<1>;
   !cTX_Data<0>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 16 | cTX_Data<1>
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 5 | 0 | 15 | 0 | 17 | 0 | 16 | 0 | 8 | 0 | 13
INPUTS | 8 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<1>  | cTX_Data<0>
INPUTMC | 7 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 16 | 0 | 17
INPUTP | 1 | 28
EXPORTS | 1 | 0 | 17
EQ | 12 | 
   cTX_Data<1>.T = cTX_DataN<0> & !cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<1>
	# cTX_DataN<0> & !cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<1>
	# !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<1>
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<1>;
   !cTX_Data<1>.CLK = CLK;	// GCK
    cTX_Data<1>.EXP  =  !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & 
	!cTX_Data<1>
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 10 | cTX_Data<3>
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 5 | 0 | 15 | 0 | 17 | 0 | 10 | 0 | 8 | 0 | 13
INPUTS | 7 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<3>
INPUTMC | 6 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 10
INPUTP | 1 | 28
EQ | 5 | 
   cTX_Data<3>.T = !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<3>
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<3>;
   !cTX_Data<3>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 8 | cTX_Tem
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 2 | 0 | 8 | 1 | 3
INPUTS | 10 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<0>  | cTX_Data<1>  | cTX_Data<3>  | cTX_Tem
INPUTMC | 9 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8
INPUTP | 1 | 28
EQ | 7 | 
   cTX_Tem.T = !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0> & 
	cTX_Data<1> & !cTX_Data<3> & !cTX_Tem
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & 
	!cTX_Data<1> & !cTX_Data<3> & cTX_Tem;
   !cTX_Tem.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 1 | 14 | fTX_CLK<3>
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 2 | 0 | 2 | 0 | 3
INPUTS | 0
EQ | 2 | 
   fTX_CLK<3>.D = Gnd;
   !fTX_CLK<3>.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

MACROCELL | 0 | 6 | fTX_N
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 2 | 0 | 5 | 1 | 15
INPUTS | 2 | fTX_Over  | fTX_Start
INPUTMC | 2 | 0 | 5 | 0 | 2
EQ | 2 | 
   fTX_N.D = fTX_Over;
   fTX_N.CLK = !fTX_Start;

MACROCELL | 0 | 11 | fTX_T
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 2 | 0 | 11 | 1 | 15
INPUTS | 4 | fTX_Over  | fTX_T  | CAN_RX  | fTX_Start
INPUTMC | 3 | 0 | 5 | 0 | 11 | 0 | 2
INPUTP | 1 | 44
EQ | 3 | 
   fTX_T.D = fTX_Over & fTX_T
	# !fTX_Over & !CAN_RX;
   fTX_T.CLK = !fTX_Start;

MACROCELL | 1 | 15 | fTX_Tem
ATTRIBUTES | 8782626 | 0
INPUTS | 5 | fTX_Over  | CAN_RX  | fTX_N  | fTX_T  | fTX_Start
INPUTMC | 4 | 0 | 5 | 0 | 6 | 0 | 11 | 0 | 2
INPUTP | 1 | 44
EQ | 4 | 
   FDDI_TX.D = !fTX_Over & !CAN_RX
	# fTX_Over & fTX_N & !fTX_T
	# fTX_Over & !fTX_N & fTX_T;
   FDDI_TX.CLK = !fTX_Start;

MACROCELL | 1 | 3 | CAN_TX_OBUF
ATTRIBUTES | 396034 | 0
INPUTS | 2 | cTX_Tem  | SD
INPUTMC | 1 | 0 | 8
INPUTP | 1 | 27
EQ | 1 | 
   CAN_TX = cTX_Tem & SD;

MACROCELL | 0 | 14 | LED_RX_OBUF
ATTRIBUTES | 8782630 | 0
INPUTS | 4 | fTX_Over  | CAN_RX  | fTX_Start  | LED_RX.PIN
INPUTMC | 2 | 0 | 5 | 0 | 2
INPUTP | 2 | 44 | 20
EQ | 3 | 
   !LED_RX.D = fTX_Over & !LED_RX.PIN
	# !fTX_Over & !CAN_RX;
   LED_RX.CLK = !fTX_Start;

MACROCELL | 0 | 13 | LED_TX_OBUF
ATTRIBUTES | 4621062 | 0
INPUTS | 10 | cTX_DataN<0>  | cTX_DataN<1>  | fBit_Value  | FDDI_RX  | fBit_Bit<0>  | fBit_Bit<1>  | cTX_Data<0>  | cTX_Data<1>  | cTX_Data<3>  | LED_TX.PIN
INPUTMC | 8 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10
INPUTP | 2 | 28 | 19
EQ | 7 | 
   LED_TX.T = !cTX_DataN<0> & cTX_DataN<1> & fBit_Value & 
	!FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & !cTX_Data<0> & 
	cTX_Data<1> & !cTX_Data<3> & LED_TX.PIN
	# !cTX_DataN<0> & cTX_DataN<1> & !fBit_Value & 
	FDDI_RX & fBit_Bit<0> & fBit_Bit<1> & cTX_Data<0> & 
	!cTX_Data<1> & !cTX_Data<3> & !LED_TX.PIN;
   !LED_TX.CLK = CLK;	// GCK
GLOBALS | 1 | 2 | CLK

PIN | CLK | 16384 | 0 | N/A | 7 | 15 | 0 | 9 | 0 | 15 | 0 | 2 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 3 | 1 | 17 | 1 | 16 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 1 | 14 | 0 | 13
PIN | FDDI_RX | 64 | 0 | N/A | 28 | 10 | 0 | 9 | 0 | 15 | 0 | 4 | 0 | 7 | 0 | 12 | 0 | 17 | 0 | 16 | 0 | 10 | 0 | 8 | 0 | 13
PIN | CAN_RX | 64 | 0 | N/A | 44 | 3 | 0 | 11 | 1 | 15 | 0 | 14
PIN | SD | 64 | 0 | N/A | 27 | 1 | 1 | 3
PIN | FDDI_TX | 536871040 | 0 | N/A | 26
PIN | CAN_TX | 536871040 | 0 | N/A | 43
PIN | LED_RX | 536870976 | 0 | N/A | 20 | 1 | 0 | 14
PIN | LED_TX | 536870976 | 0 | N/A | 19 | 1 | 0 | 13

cantofddi.mfd - 源码说明

本页面展示了「RS232-光纤的CPLD调制解调源程序」中的 cantofddi.mfd 源码文件，采用 MFD 编程语言编写，共 284 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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