📄 cantofddi.rpt
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CAN_TX <= (cTX_Tem AND SD);
FDCPE_FDDI_TX: FDCPE port map (FDDI_TX,FDDI_TX_D,NOT fTX_Start,'0','0');
FDDI_TX_D <= ((NOT fTX_Over AND NOT CAN_RX)
OR (fTX_Over AND fTX_N AND NOT fTX_T)
OR (fTX_Over AND NOT fTX_N AND fTX_T));
FDCPE_LED_RX: FDCPE port map (LED_RX,LED_RX_D,NOT fTX_Start,'0','0');
LED_RX_D <= ((fTX_Over AND NOT LED_RX.PIN)
OR (NOT fTX_Over AND NOT CAN_RX));
FTCPE_LED_TX: FTCPE port map (LED_TX,LED_TX_T,NOT CLK,'0','0');
LED_TX_T <= ((NOT cTX_DataN(0) AND cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0) AND
cTX_Data(1) AND NOT cTX_Data(3) AND LED_TX.PIN)
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(0) AND
NOT cTX_Data(1) AND NOT cTX_Data(3) AND NOT LED_TX.PIN));
FTCPE_cTX_Data0: FTCPE port map (cTX_Data(0),cTX_Data_T(0),NOT CLK,'0','0');
cTX_Data_T(0) <= ((cTX_Data(1).EXP)
OR (NOT cTX_DataN(0) AND NOT cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0))
OR (NOT cTX_DataN(0) AND NOT cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(0))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0) AND
cTX_Data(1))
OR (NOT cTX_DataN(0) AND fBit_Value AND NOT FDDI_RX AND
fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0) AND cTX_Data(1) AND
cTX_Data(3))
OR (NOT cTX_DataN(0) AND NOT fBit_Value AND FDDI_RX AND
fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(0) AND NOT cTX_Data(1) AND
cTX_Data(3)));
FTCPE_cTX_Data1: FTCPE port map (cTX_Data(1),cTX_Data_T(1),NOT CLK,'0','0');
cTX_Data_T(1) <= ((cTX_DataN(0) AND NOT cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(1))
OR (cTX_DataN(0) AND NOT cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(1))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(1))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(1)));
FTCPE_cTX_Data3: FTCPE port map (cTX_Data(3),cTX_Data_T(3),NOT CLK,'0','0');
cTX_Data_T(3) <= ((NOT cTX_DataN(0) AND cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(3))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(3)));
FTCPE_cTX_DataN0: FTCPE port map (cTX_DataN(0),cTX_DataN_T(0),NOT CLK,'0','0');
cTX_DataN_T(0) <= ((NOT cTX_DataN(1) AND fBit_Value AND NOT FDDI_RX AND
fBit_Bit(0) AND fBit_Bit(1))
OR (NOT cTX_DataN(1) AND NOT fBit_Value AND FDDI_RX AND
fBit_Bit(0) AND fBit_Bit(1)));
FTCPE_cTX_DataN1: FTCPE port map (cTX_DataN(1),cTX_DataN_T(1),NOT CLK,'0','0');
cTX_DataN_T(1) <= ((cTX_DataN(0) AND NOT cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1))
OR (cTX_DataN(0) AND NOT cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0) AND
cTX_Data(1) AND NOT cTX_Data(3))
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(0) AND
NOT cTX_Data(1) AND NOT cTX_Data(3)));
FTCPE_cTX_Tem: FTCPE port map (cTX_Tem,cTX_Tem_T,NOT CLK,'0','0');
cTX_Tem_T <= ((NOT cTX_DataN(0) AND cTX_DataN(1) AND fBit_Value AND
NOT FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND NOT cTX_Data(0) AND
cTX_Data(1) AND NOT cTX_Data(3) AND NOT cTX_Tem)
OR (NOT cTX_DataN(0) AND cTX_DataN(1) AND NOT fBit_Value AND
FDDI_RX AND fBit_Bit(0) AND fBit_Bit(1) AND cTX_Data(0) AND
NOT cTX_Data(1) AND NOT cTX_Data(3) AND cTX_Tem));
FDCPE_fBit_Bit0: FDCPE port map (fBit_Bit(0),fBit_Bit_D(0),NOT CLK,'0','0');
fBit_Bit_D(0) <= ((fBit_Value AND NOT FDDI_RX AND fBit_Bit(0))
OR (NOT fBit_Value AND FDDI_RX AND fBit_Bit(0)));
FDCPE_fBit_Bit1: FDCPE port map (fBit_Bit(1),fBit_Bit_D(1),NOT CLK,'0','0');
fBit_Bit_D(1) <= ((NOT fBit_Bit(0) AND NOT fBit_Bit(1))
OR (fBit_Value AND NOT FDDI_RX AND fBit_Bit(0) AND
fBit_Bit(1))
OR (NOT fBit_Value AND FDDI_RX AND fBit_Bit(0) AND
fBit_Bit(1)));
FDCPE_fBit_Value: FDCPE port map (fBit_Value,NOT FDDI_RX,NOT CLK,'0','0');
FDCPE_fTX_CLK0: FDCPE port map (fTX_CLK(0),fTX_CLK_D(0),NOT CLK,'0','0');
fTX_CLK_D(0) <= (NOT fTX_CLK(0) AND NOT fTX_CLK(1) AND NOT fTX_CLK(2) AND
NOT fTX_CLK(3));
FDCPE_fTX_CLK1: FDCPE port map (fTX_CLK(1),'0',NOT CLK,'0','0');
FDCPE_fTX_CLK2: FDCPE port map (fTX_CLK(2),'0',NOT CLK,'0','0');
FDCPE_fTX_CLK3: FDCPE port map (fTX_CLK(3),'0',NOT CLK,'0','0');
FDCPE_fTX_N: FDCPE port map (fTX_N,fTX_Over,NOT fTX_Start,'0','0');
FDCPE_fTX_Over: FDCPE port map (fTX_Over,fTX_Over_D,NOT fTX_Start,'0','0');
fTX_Over_D <= (fTX_Over AND fTX_N);
FTCPE_fTX_Start: FTCPE port map (fTX_Start,fTX_Start_T,NOT CLK,'0','0');
fTX_Start_T <= (NOT fTX_CLK(0) AND NOT fTX_CLK(1) AND NOT fTX_CLK(2) AND
NOT fTX_CLK(3));
FDCPE_fTX_T: FDCPE port map (fTX_T,fTX_T_D,NOT fTX_Start,'0','0');
fTX_T_D <= ((fTX_Over AND fTX_T)
OR (NOT fTX_Over AND NOT CAN_RX));
Register Legend:
FDCPE (Q,D,C,CLR,PRE);
FTCPE (Q,D,C,CLR,PRE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC9536-10-VQ44
--------------------------------
/44 43 42 41 40 39 38 37 36 35 34 \
| 1 33 |
| 2 32 |
| 3 31 |
| 4 30 |
| 5 XC9536-10-VQ44 29 |
| 6 28 |
| 7 27 |
| 8 26 |
| 9 25 |
| 10 24 |
| 11 23 |
\ 12 13 14 15 16 17 18 19 20 21 22 /
--------------------------------
Pin Signal Pin Signal
No. Name No. Name
1 CLK 23 TIE
2 TIE 24 TDO
3 TIE 25 GND
4 GND 26 VCC
5 TIE 27 TIE
6 TIE 28 TIE
7 TIE 29 TIE
8 TIE 30 TIE
9 TDI 31 TIE
10 TMS 32 TIE
11 TCK 33 TIE
12 TIE 34 TIE
13 LED_TX 35 VCC
14 LED_RX 36 TIE
15 VCC 37 CAN_TX
16 TIE 38 CAN_RX
17 GND 39 TIE
18 TIE 40 TIE
19 TIE 41 TIE
20 FDDI_TX 42 TIE
21 SD 43 TIE
22 FDDI_RX 44 TIE
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc9536-10-VQ44
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
FASTConnect/UIM optimzation : ON
Local Feedback : ON
Pin Feedback : ON
Input Limit : 36
Pterm Limit : 25
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