📄 conti_svpwm.mdl
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Model {
Name "conti_SVPWM"
Version 4.00
SampleTimeColors off
LibraryLinkDisplay "none"
WideLines off
ShowLineDimensions off
ShowPortDataTypes off
ShowStorageClass off
ExecutionOrder off
RecordCoverage off
CovPath "/"
CovSaveName "covdata"
CovMetricSettings "dw"
CovNameIncrementing off
CovHtmlReporting on
BlockNameDataTip off
BlockParametersDataTip off
BlockDescriptionStringDataTip off
ToolBar on
StatusBar on
BrowserShowLibraryLinks off
BrowserLookUnderMasks off
InitFcn "powericon('psbinitsys',bdroot);"
Created "Sun Oct 05 21:28:25 2003"
UpdateHistory "UpdateHistoryNever"
ModifiedByFormat "%<Auto>"
LastModifiedBy "李洁"
ModifiedDateFormat "%<Auto>"
LastModifiedDate "Mon Oct 06 22:11:47 2003"
ModelVersionFormat "1.%<AutoIncrement:42>"
ConfigurationManager "None"
SimParamPage "Solver"
StartTime "0.0"
StopTime "3"
SolverMode "Auto"
Solver "FixedStepDiscrete"
RelTol "1e-3"
AbsTol "auto"
Refine "1"
MaxStep "auto"
MinStep "auto"
MaxNumMinSteps "-1"
InitialStep "auto"
FixedStep "2e-7"
MaxOrder 5
OutputOption "RefineOutputTimes"
OutputTimes "[]"
LoadExternalInput off
ExternalInput "[t, u]"
SaveTime off
TimeSaveName "tout"
SaveState off
StateSaveName "xout"
SaveOutput off
OutputSaveName "yout"
LoadInitialState on
InitialState "xFinal"
SaveFinalState off
FinalStateName "xFinal"
SaveFormat "Array"
LimitDataPoints on
MaxDataPoints "1000"
Decimation "1"
AlgebraicLoopMsg "warning"
MinStepSizeMsg "warning"
UnconnectedInputMsg "warning"
UnconnectedOutputMsg "warning"
UnconnectedLineMsg "warning"
InheritedTsInSrcMsg "warning"
SingleTaskRateTransMsg "none"
MultiTaskRateTransMsg "error"
IntegerOverflowMsg "warning"
CheckForMatrixSingularity "none"
UnnecessaryDatatypeConvMsg "none"
Int32ToFloatConvMsg "warning"
InvalidFcnCallConnMsg "error"
SignalLabelMismatchMsg "none"
LinearizationMsg "none"
VectorMatrixConversionMsg "none"
SfunCompatibilityCheckMsg "none"
BlockPriorityViolationMsg "warning"
ArrayBoundsChecking "none"
ConsistencyChecking "none"
ZeroCross on
Profile off
SimulationMode "normal"
RTWSystemTargetFile "grt.tlc"
RTWOptions "-aEnforceIntegerDowncast=1 -aExtMode=0 -aFoldNonRol"
"ledExpr=1 -aForceParamTrailComments=0 -aGenerateComments=1 -aIgnoreCustomStor"
"ageClasses=1 -aIncHierarchyInIds=0 -aInlineInvariantSignals=0 -aLocalBlockOut"
"puts=1 -aLogVarNameModifier=\"rt_\" -aRTWVerbose=1 -aRollThreshold=5 -aShowEl"
"iminatedStatements=1"
RTWInlineParameters off
RTWRetainRTWFile off
RTWTemplateMakefile "grt_default_tmf"
RTWMakeCommand "make_rtw"
RTWGenerateCodeOnly off
TLCProfiler off
TLCDebug off
TLCCoverage off
AccelSystemTargetFile "accel.tlc"
AccelTemplateMakefile "accel_default_tmf"
AccelMakeCommand "make_rtw"
TryForcingSFcnDF off
ExtModeMexFile "ext_comm"
ExtModeBatchMode off
ExtModeTrigType "manual"
ExtModeTrigMode "normal"
ExtModeTrigPort "1"
ExtModeTrigElement "any"
ExtModeTrigDuration 1000
ExtModeTrigHoldOff 0
ExtModeTrigDelay 0
ExtModeTrigDirection "rising"
ExtModeTrigLevel 0
ExtModeArchiveMode "off"
ExtModeAutoIncOneShot off
ExtModeIncDirWhenArm off
ExtModeAddSuffixToVar off
ExtModeWriteAllDataToWs off
ExtModeArmWhenConnect on
ExtModeSkipDownloadWhenConnect off
ExtModeLogAll on
ExtModeAutoUpdateStatusClock on
OptimizeBlockIOStorage on
BufferReuse on
ParameterPooling on
BlockReductionOpt on
RTWExpressionDepthLimit 5
BooleanDataType off
BlockDefaults {
Orientation "right"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
NamePlacement "normal"
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
ShowName on
}
AnnotationDefaults {
HorizontalAlignment "center"
VerticalAlignment "middle"
ForegroundColor "black"
BackgroundColor "white"
DropShadow off
FontName "Helvetica"
FontSize 10
FontWeight "normal"
FontAngle "normal"
}
LineDefaults {
FontName "Helvetica"
FontSize 9
FontWeight "normal"
FontAngle "normal"
}
System {
Name "conti_SVPWM"
Location [2, 74, 1014, 724]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
ReportName "simulink-default.rpt"
Block {
BlockType Reference
Name "Bus Bar (thin horiz)1"
Tag "PoWeRsYsTeMbLoCk"
Ports [0, 2]
Position [117, 225, 168, 230]
Orientation "up"
ShowName off
SourceBlock "powerlib2/Connectors/Bus Bar (thin horiz)"
SourceType "Bus Bar"
input "0"
output "2"
PSBOutputType "11111111111111111111111111111111111111111111111"
"1111111111111111111111111111111111111"
}
Block {
BlockType Reference
Name "Demux1"
Ports [1, 3]
Position [480, 174, 520, 286]
NamePlacement "alternate"
SourceBlock "powerlib2/Machines/Machines\nMeasurement\nDemux"
SourceType "Machine measurements"
machType "Asynchronous"
ssm1 on
ssm2 on
ssm3 on
ssm4 on
ssm5 on
ssm6 on
sm1 on
sm2 on
sm3 on
sm4 on
sm5 on
sm6 on
sm7 on
sm8 on
sm9 on
sm10 on
sm11 on
asm1 off
asm2 off
asm3 off
asm4 off
asm5 on
asm6 off
asm7 off
asm8 off
asm9 on
asm10 on
asm11 off
pmsm1 on
pmsm2 on
pmsm3 on
pmsm4 on
pmsm5 on
pmsm6 on
lastType "3"
}
Block {
BlockType Reference
Name "Discret System Block"
Ports []
Position [451, 44, 565, 78]
DropShadow on
ShowName off
FontName "new century schoolbook"
FontSize 12
SourceBlock "powerlib2/Discrete System"
SourceType "PSB option block system"
methode "off"
Ts "2e-7"
}
Block {
BlockType Reference
Name "IGBT Inverter1"
Tag "PoWeRsYsTeMbLoCk"
Ports [3, 3]
Position [180, 187, 245, 253]
NamePlacement "alternate"
SourceBlock "powerlib2/Power\nElectronics/Universal Bridge"
SourceType "Universal Bridge"
arms "3"
confi "ABC as output terminals"
injcc "1000"
cf "inf"
device "IGBT / Diodes"
Ron "1e-3"
Lon "0"
VFs "[ 0.8 0.8 ]"
Vf ".8"
gtoparameters "[ 1e-6 , 1e-6 ]"
igbtparameters "[ 1e-5, 2e-5]"
mesure "None"
PSBOutputType "111"
}
Block {
BlockType Reference
Name "Induction Motor\n50 HP / 380V"
Tag "PoWeRsYsTeMbLoCk"
Ports [4, 1]
Position [380, 187, 455, 273]
NamePlacement "alternate"
SourceBlock "powerlib2/Machines/Asynchronous Machine\nSI Uni"
"ts"
SourceType "Asynchronous Machine"
rotType "Squirrel-cage"
ctrl "Stationary"
x1 "[ 1100, 380, 50 ]"
x2 "[ 5.27 0.002]"
x3 "[5.07 0.058 ]"
x4 "0.421"
x5 "[0.02 0 2 ]"
x6 "[ 1, 0 , 0 , 0 , 0 , 0 , 0 , 0 ]"
PSBOutputType "1110"
iounits "1"
}
Block {
BlockType Constant
Name "Load_torque 1"
Position [255, 303, 285, 327]
NamePlacement "alternate"
Value "0"
VectorParams1D on
}
Block {
BlockType Step
Name "Load_torque1"
Position [255, 263, 285, 287]
NamePlacement "alternate"
Time "0"
Before "0"
After "5"
SampleTime "0"
VectorParams1D on
}
Block {
BlockType SubSystem
Name "SVPWM Generator"
Ports [0, 1]
Position [70, 225, 110, 285]
ForegroundColor "orange"
BackgroundColor "lightBlue"
ShowPortLabels on
TreatAsAtomicUnit off
RTWSystemCode "Auto"
RTWFcnNameOpts "Auto"
RTWFileNameOpts "Auto"
MaskType "SVPWM发生器"
MaskPromptString "频率（Hz）"
MaskStyleString "edit"
MaskTunableValueString "on"
MaskEnableString "on"
MaskVisibilityString "on"
MaskToolTipString "on"
MaskVariables "Freq=@1;"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "50"
System {
Name "SVPWM Generator"
Location [2, 82, 1014, 743]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "automatic"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Clock
Name "Clock"
Position [320, 120, 340, 140]
DisplayTime off
Decimation "10"
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion"
Position [640, 44, 660, 66]
ShowName off
DataType "boolean"
SaturateOnIntegerOverflow on
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion1"
Position [725, 44, 745, 66]
ShowName off
DataType "double"
SaturateOnIntegerOverflow on
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion2"
Position [725, 94, 745, 116]
ShowName off
DataType "double"
SaturateOnIntegerOverflow on
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion3"
Position [725, 144, 745, 166]
ShowName off
DataType "double"
SaturateOnIntegerOverflow on
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion4"
Position [630, 94, 650, 116]
ShowName off
DataType "boolean"
SaturateOnIntegerOverflow on
}
Block {
BlockType DataTypeConversion
Name "Data Type \nConversion5"
Position [630, 144, 650, 166]
ShowName off
DataType "boolean"
SaturateOnIntegerOverflow on
}
Block {
BlockType Demux
Name "Demux1"
Ports [1, 3]
Position [540, 46, 545, 84]
BackgroundColor "black"
ShowName off
Outputs "3"
BusSelectionMode off
}
Block {
BlockType Demux
Name "Demux2"
Ports [1, 3]
Position [245, 71, 250, 109]
BackgroundColor "black"
ShowName off
Outputs "3"
BusSelectionMode off
}
Block {
BlockType Reference
Name "Discrete\nVirtual PLL"
Ports [0, 3]
Position [25, 26, 90, 124]
SourceBlock "powerlib_extras/Discrete \nControl Blocks/D"
"iscrete\nVirtual PLL"
SourceType "Discrete Virtual PLL"
Freq "Freq"
Phase "0"
Ts "2e-7"
}
Block {
BlockType Logic
Name "Logical\nOperator"
Ports [1, 1]
Position [675, 45, 705, 65]
ShowName off
Operator "NOT"
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator1"
Ports [1, 1]
Position [670, 95, 700, 115]
ShowName off
Operator "NOT"
Inputs "2"
}
Block {
BlockType Logic
Name "Logical\nOperator2"
Ports [1, 1]
Position [670, 145, 700, 165]
ShowName off
Operator "NOT"
Inputs "2"
}
Block {
BlockType MATLABFcn
Name "MATLAB Fcn"
Position [460, 50, 520, 80]
MATLABFcn "SVPWM_sim(u(1),u(2),u(3),u(4),u(5))"
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