sc2440pdd-wistron.cpp

支持三星原产的S3C2413开发板

                else {
                    // Clear Out Packet Ready - receive FIFO should be empty
                    SetClearIndexedReg(pContext,0,OUT_CSR1_REG_OFFSET,
                        SERVICED_OUT_PKY_RDY, SET);
                    pContext->sendDataEnd = FALSE;
                }

                if (pContext->fSpeedReported == FALSE) {
                    // After Every Reset Notify MDD of Speed setting.
                    // This device can only support FULL Speed.
                    pContext->pfnNotify(pContext->pvMddContext, UFN_MSG_BUS_SPEED,
                        BS_FULL_SPEED);
                    pContext->fSpeedReported = TRUE;
                }

                pContext->pfnNotify(pContext->pvMddContext, UFN_MSG_SETUP_PACKET, (DWORD) &udr);
            }

            bEP0IrqStatus &= ~EP0_OUT_PACKET_RDY;
        }
        // If Out Packet ready and No Data then must be an End Transfer 
        else if ( (bEP0IrqStatus & EP0_OUT_PACKET_RDY) && (dwSetupPacketSize == 0) ) {
            // Update the register - Clear OPR, Set DE
            SetClearIndexedReg(pContext, 0, OUT_CSR1_REG_OFFSET,
                DATA_END | SERVICED_OUT_PKY_RDY, SET);

            peps->dwEpState = EP_STATE_IDLE;             
            DEBUGMSG(ZONE_RECEIVE, (_T("%s End Xfer \r\n"), pszFname));
        }
		else if (EP0_OUT_MORE_DATA == TRUE && EP0_TOTAL_OUT_LEN != 0)
		{
            HandleEndpointEvent(pContext, 0, bEP0IrqStatus);
			EP0_TOTAL_OUT_LEN -= (USHORT)dwSetupPacketSize;
			if (!EP0_TOTAL_OUT_LEN)
				EP0_OUT_MORE_DATA = FALSE;
		}
        else {
            HandleEndpointEvent(pContext, 0, bEP0IrqStatus);
        }
    }
    // Process All Other (besides EP0) Endpoints

    BYTE bEpMaskBits = ReadReg(pContext, EP_INT_EN_REG_OFFSET);

    DEBUGMSG(ZONE_FUNCTION, (_T("%s HUSB Status, %x\r\n"), pszFname, bEpIrqStat));
    BYTE bStatusBit = 0;
    for (DWORD dwEndpoint = 1; dwEndpoint < ENDPOINT_COUNT; ++dwEndpoint) {
        // Check the Interrupt Mask 
        // Check the Interrupt Status 
        bStatusBit =  EpToIrqStatBit(dwEndpoint);
        if ( (bEpMaskBits & bStatusBit) &&
             (bEpIrqStat & bStatusBit) ) {
            ClearEndpointInterrupt(pContext, dwEndpoint);
            HandleEndpointEvent(pContext, dwEndpoint, bEpIrqStat);
        }
    }
    
    FUNCTION_LEAVE_MSG();
}


/****************************************************************
@doc INTERNAL

@func VOID | SerUSB_InternalMapRegisterAddresses |
This routine maps the ASIC registers. 
It's an artifact of this
implementation.

@rdesc None.
****************************************************************/
static
DWORD MapRegisterSet(PCTRLR_PDD_CONTEXT pContext)
{
    SETFNAME();
    FUNCTION_ENTER_MSG();

    PREFAST_DEBUGCHK(pContext);

    DEBUGCHK(g_pUDCBase == NULL);

    PBYTE   pVMem;
    DWORD   dwRet = ERROR_SUCCESS;

    // Map CSR registers.
    pVMem = (PBYTE)VirtualAlloc(0, PAGE_SIZE, MEM_RESERVE, PAGE_NOACCESS);

    if (pVMem) {
        BOOL fSuccess = VirtualCopy(pVMem, (LPVOID)pContext->dwIOBase,
            pContext->dwIOLen, PAGE_READWRITE | PAGE_NOCACHE);
        if (!fSuccess) {
            VirtualFree(pVMem, 0, MEM_RELEASE);
            dwRet = GetLastError();
            DEBUGMSG(ZONE_ERROR, (_T("%s Virtual Copy: FAILED\r\n"), pszFname));
        }
        else {
            g_pUDCBase = pVMem + BASE_REGISTER_OFFSET;

            DEBUGMSG(ZONE_INIT, (_T("%s VirtualCopy Succeeded, pVMem:%x\r\n"), 
                pszFname, pVMem));
        }
    } 
    else {
        dwRet = GetLastError();
        DEBUGMSG(ZONE_ERROR, (_T("%s Virtual Alloc: FAILED\r\n"), pszFname));
    }

    FUNCTION_LEAVE_MSG();
    
    return dwRet;
}

/*++

Routine Description:

Deallocate register space.

Arguments:

None.

Return Value:

None.

--*/
static
VOID
UnmapRegisterSet(PCTRLR_PDD_CONTEXT pContext)
{
    // Unmap any memory areas that we may have mapped.
    if (g_pUDCBase) {
        VirtualFree((PVOID) g_pUDCBase, 0, MEM_RELEASE);
        g_pUDCBase = NULL;
    }
}


// interrupt service routine.
static
DWORD
WINAPI
ISTMain(
        LPVOID lpParameter
        )
{
//+ Ref. G200
    volatile S3C2440A_IOPORT_REG *s2440IOP = NULL;
     PHYSICAL_ADDRESS pa;

    // Map the s3c2410x register pointers.
    //
    pa.QuadPart = S3C2440A_BASE_REG_PA_IOPORT;
    s2440IOP = (S3C2440A_IOPORT_REG *) MmMapIoSpace(pa, sizeof(S3C2440A_IOPORT_REG), FALSE);

     //Initial the
     //s2440IOP->GPFDAT  |= (0x1<<7);
//RETAILMSG(1, (TEXT(">>>Drivers_USBFN_USB_D+_Disable...\r\n")));
s2440IOP->GPJDAT  &= ~(0x1 << 11);
	 //v_pIOPregs->GPJDAT |= ( 1  << 11);	  // GPJ11 : USB D+ = 1
//- Ref. G200

    SETFNAME();
    FUNCTION_ENTER_MSG();

    PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) lpParameter;
    ValidateContext(pContext);

    CeSetThreadPriority(pContext->hIST, pContext->dwISTPriority);

    while (!pContext->fExitIST) {
        pContext->fRestartIST = FALSE;

        // Enable Suspend Mode in the Power Register
        SetClearReg(pContext, PWR_REG_OFFSET, SUSPEND_MODE_ENABLE_CTRL, SET);

        // Disable All Endpoint interrupts
        WriteReg(pContext, EP_INT_EN_REG_OFFSET, 0); // Disable All

        // Enable Device interrupts
        WriteReg(pContext, USB_INT_EN_REG_OFFSET, (USB_RESET_INTR | USB_SUSPEND_INTR));

        // Enable Endpoint interrupt 0
        BYTE irqEnBit = EpToIrqStatBit(0);
        SetClearReg(pContext, EP_INT_EN_REG_OFFSET, irqEnBit, SET);

        while (TRUE) {
//            DWORD dwWait = WaitForSingleObject(pContext->hevInterrupt, INFINITE);
            DWORD dwWait = WaitForSingleObject(pContext->hevInterrupt, 1000);
//  RETAILMSG(1, (TEXT(">>>USBFN_WaitForObject...\r\n")));
            if (pContext->fExitIST || pContext->fRestartIST) {
                break;
            }

            if (dwWait == WAIT_OBJECT_0) {
				//Henry 2006/03/23, when plug cable, pull low GPFDAT 7
//  RETAILMSG(1, (TEXT(">>>Drivers_USBFN_WaitObject_0...\r\n")));
//	RETAILMSG(1, (TEXT(">>>>>>>>>>>>>>>>>>>>Drivers_USBFN_USB_D+_Enable...\r\n")));
		        // W1. USB D+ enable
                s2440IOP->GPJDAT  |= (0x1<<11);

                HandleUSBEvent(pContext);
                InterruptDone(pContext->dwSysIntr);
            }
            else {
//  RETAILMSG(1, (TEXT(">>>Drivers_USBFN_WaitForMultipleObj failed...\r\n")));
				if(!(s2440IOP->GPGDAT & 0x1)) //USB in is detach
				{
					//USB is detached, but state is attached
				   if(pContext->attachedState == UFN_ATTACH)
				   {
				       pContext->pfnNotify(pContext->pvMddContext, UFN_MSG_BUS_EVENTS, UFN_DETACH);
					   pContext->attachedState = UFN_DETACH;
                       s2440IOP->GPJDAT  &= ~(0x1 << 11);
				   }
				}
				else
				{
					//USB is attached, but state is detached
				   if(pContext->attachedState == UFN_DETACH)
				   {
				       pContext->pfnNotify(pContext->pvMddContext, UFN_MSG_BUS_EVENTS, UFN_ATTACH);
					   pContext->attachedState = UFN_ATTACH;
                       s2440IOP->GPJDAT  |= (0x1 << 11);
				   }
				}

                //DEBUGMSG(ZONE_INIT, (_T("%s WaitForMultipleObjects failed. Exiting IST.\r\n"), 
                //    pszFname));
                //break;
            }
        }

        // Disable Device  interrupts - write Zeros to Disable
        WriteReg(pContext, USB_INT_EN_REG_OFFSET, 0 );

        // Disable endpoint interrupts - write Zeros to Disable
        WriteReg(pContext, EP_INT_EN_REG_OFFSET, 0);
        
        // Clear any outstanding device & endpoint interrupts
        // USB Device Interrupt Status - Write a '1' to Clear 
        WriteReg(pContext, USB_INT_REG_OFFSET, 
            (USB_RESET_INTR | USB_RESUME_INTR | USB_SUSPEND_INTR));
        // End point Interrupt Status - Write a '1' to Clear
        WriteReg(pContext, EP_INT_REG_OFFSET, CLEAR_ALL_EP_INTRS);

        // Send detach
        pContext->pfnNotify(pContext->pvMddContext, 
            UFN_MSG_BUS_EVENTS, UFN_DETACH);

		// W1. USB D+ disable
        s2440IOP->GPJDAT  &= ~(0x1<<11);

        pContext->fSpeedReported = FALSE;
        pContext->attachedState = UFN_DETACH;
    }

    if (s2440IOP!=NULL)
       MmUnmapIoSpace((PVOID)s2440IOP,0);

    FUNCTION_LEAVE_MSG();

    return 0;
}


static
VOID
StartTransfer(
              PCTRLR_PDD_CONTEXT pContext,
              PEP_STATUS peps,
              PSTransfer pTransfer
              )
{
    SETFNAME();
    FUNCTION_ENTER_MSG();

    DEBUGCHK(pContext);
    PREFAST_DEBUGCHK(peps);

    DEBUGCHK(!peps->pTransfer);
    ValidateTransferDirection(pContext, peps, pTransfer);

    DEBUGMSG(ZONE_TRANSFER, (_T("%s Setting up %s transfer on ep %u for %u bytes\r\n"),
        pszFname, (pTransfer->dwFlags == USB_IN_TRANSFER) ? _T("in") : _T("out"),
        peps->dwEndPointNumber, pTransfer->cbBuffer));

    // Enable transfer interrupts.
    peps->pTransfer = pTransfer;

    if (pTransfer->dwFlags == USB_IN_TRANSFER) {
        // Must Clear both Send and Sent Stall - the HW is setting this bit 
        // during the Endpoint initialization process. It must be cleared here 
        // to insure proper operation.
        SetClearIndexedReg(pContext, peps->dwEndPointNumber, IN_CSR1_REG_OFFSET,
            (IN_SEND_STALL | IN_SENT_STALL), CLEAR);               

        HandleTx(pContext, peps, 1);
    }
    else {
        // Set the Max Packet Size Register
        BYTE maxPacketBits = (BYTE) (peps->dwPacketSizeAssigned >> 3);
        WriteIndexedReg(pContext, peps->dwEndPointNumber, MAX_PKT_SIZE_REG_OFFSET, 
            maxPacketBits); 

        EnableEndpointInterrupt(pContext,peps->dwEndPointNumber);

        // There may be a packet available.  If so process it...
        BYTE bEpIrqStat = ReadIndexedReg(pContext, peps->dwEndPointNumber,
            OUT_CSR1_REG_OFFSET);
        if  (bEpIrqStat & OUT_PACKET_READY) {
            HandleRx(pContext, peps);
        }
    }
    
    FUNCTION_LEAVE_MSG();
}


DWORD
WINAPI
UfnPdd_IssueTransfer(
    PVOID  pvPddContext,
    DWORD  dwEndpoint,
    PSTransfer pTransfer
    )
{
    SETFNAME();
    FUNCTION_ENTER_MSG();

    DEBUGCHK(EP_VALID(dwEndpoint));

    PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) pvPddContext;
    ValidateContext(pContext);

    PEP_STATUS peps = GetEpStatus(pContext, dwEndpoint);
    LOCK_ENDPOINT(peps);
    DEBUGCHK(peps->fInitialized);
    DEBUGCHK(pTransfer->cbTransferred == 0);

    DWORD dwRet = ERROR_SUCCESS;

    // Note For the HW NAKs IN requests and DOES NOT let SW
    // know that the Host is trying to send a request. SO... Start the Transfer 
    // In Now!
    // Start the Transfer
    DEBUGCHK(peps->pTransfer == NULL);
    StartTransfer(pContext, peps, pTransfer);

    UNLOCK_ENDPOINT(peps);

    FUNCTION_LEAVE_MSG();

    return dwRet;
}


DWORD
WINAPI
UfnPdd_AbortTransfer(
    PVOID           pvPddContext,
    DWORD           dwEndpoint,
    PSTransfer      pTransfer
    )
{
    SETFNAME();
    FUNCTION_ENTER_MSG();

    PREFAST_DEBUGCHK(pTransfer);
    DEBUGCHK(EP_VALID(dwEndpoint));

    PCTRLR_PDD_CONTEXT pContext = (PCTRLR_PDD_CONTEXT) pvPddContext;
    ValidateContext(pContext);

    PEP_STATUS peps = GetEpStatus(pContext, dwEndpoint);
    LOCK_ENDPOINT(peps);
    DEBUGCHK(peps->fInitialized);

    ValidateTransferDirection(pContext, peps, pTransfer);

    DEBUGCHK(pTransfer == peps->pTransfer);
    CompleteTransfer(pContext, peps, UFN_CANCELED_ERROR);

    peps->dwEpState = EP_STATE_IDLE;
    ResetEndpoint( pContext,peps);

    UNLOCK_ENDPOINT(peps);

    FUNCTION_LEAVE_MSG();

    return ERROR_SUCCESS;
}


// This does not do much because there is not any way to control
// power on this controller.
static
CEDEVICE_POWER_STATE
SetPowerState(
    PCTRLR_PDD_CONTEXT      pContext,
    CEDEVICE_POWER_STATE    cpsNew
    )
{
    SETFNAME();
    
    PREFAST_DEBUGCHK(pContext);
    DEBUGCHK(VALID_DX(cpsNew));
    ValidateContext(pContext);

    // Adjust cpsNew.
    if (cpsNew != pContext->cpsCurrent) {
        if (cpsNew == D1 || cpsNew == D2) {
            // D1 and D2 are not supported.
            cpsNew = D0;