📄 cs8900a2413.c
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//
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//
// Use of this source code is subject to the terms of the Microsoft end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to use
// this source code. For a copy of the EULA, please see the LICENSE.RTF on your
// install media.
//
//------------------------------------------------------------------------------
//
// File: cs8900a.c
//
#include <windows.h>
#include <ceddk.h>
#include <ethdbg.h>
#include <oal.h>
//------------------------------------------------------------------------------
#define CS8900A_EISA_NUMBER 0x630e
#define RETRY_COUNT 100 //0x00100000
//------------------------------------------------------------------------------
#include "bsp_cfg.h" // Definition of BSP_SMDK2413.
#include "bsp_base_reg_cfg.h" // Refer CS8900 Base address
/******************************************************************************/
/* For SMDK2413
* in SMDK2413, For CS8900 16-bit interface,
* the A1 address value has to be tied to CS8900 A0 pin(A2->A0 for 32bit interface).
* so, the offset value(include I/O select address) has to be left-shift 1.
* The source is from \PLATFORM\COMMON\SRC\COMMON\ETHDRV\CS8900A\cs8900a.c
*/
#if (BSP_SMDK2413==1 && !SMDK2413_REV14)
/*
* I/O mode register mapping
*/
#define IO_RX_TX_DATA_0 0x0000
#define IO_RX_TX_DATA_1 0x0002
#define IO_TX_CMD 0x0004
#define IO_TX_LENGTH 0x0006
#define IO_ISQ 0x0008
#define IO_PACKET_PAGE_POINTER 0x000A
#define IO_PACKET_PAGE_DATA_0 0x000C
#define IO_PACKET_PAGE_DATA_1 0x000E
#ifdef SMDK2413_REV14
#define IOREAD(o) ((USHORT)*((volatile USHORT *)(dwEthernetIOBase + ((o)) )))
#define IOWRITE(o, d) *((volatile USHORT *)(dwEthernetIOBase + ((o)))) = (USHORT)(d)
#define MEMREAD(o) ((USHORT)*((volatile USHORT *)(dwEthernetMemBase + ((o)))))
#define MEMWRITE(o, d) *((volatile USHORT *)(dwEthernetMemBase + ((o)))) = (USHORT)(d)
#else
#define IOREAD(o) ((USHORT)*((volatile USHORT *)(dwEthernetIOBase + ((o)<<1) )))
#define IOWRITE(o, d) *((volatile USHORT *)(dwEthernetIOBase + ((o)<<1))) = (USHORT)(d)
#define MEMREAD(o) ((USHORT)*((volatile USHORT *)(dwEthernetMemBase + ((o)<<1))))
#define MEMWRITE(o, d) *((volatile USHORT *)(dwEthernetMemBase + ((o)<<1))) = (USHORT)(d)
#endif
#define MAX_COUNT 100 //0x100000
static DWORD dwEthernetIOBase;
static DWORD dwEthernetMemBase;
#endif
/******************************************************************************/
//static BOOL bIsPacket;
//---------------------------------------------
typedef struct {
UINT16 DATA0; // 0
UINT16 DATA1; // 2
UINT16 TXCMD; // 4
UINT16 TXLENGTH; // 6
UINT16 ISQ; // 8
UINT16 PAGEIX; // a
UINT16 PAGE0; // c
UINT16 PAGE1; // 10
} CS8900A_REGS;
static CS8900A_REGS *g_pCS8900;
static UINT16 g_hash[4];
static UINT32 g_filter;
//------------------------------------------------------------------------------
#define MSG_ON 0
#define EISA_NUMBER 0x0000
#define PRODUCT_ID_CODE 0x0002
#define IO_BASE_ADDRESS 0x0020
#define INTERRUPT_NUMBER 0x0022
#define DMA_CHANNEL_NUMBER 0x0024
#define DMA_START_OF_FRAME 0x0026
#define DMA_FRAME_COUNT 0x0028
#define RXDMA_BYTE_COUNT 0x002a
#define MEMORY_BASE_ADDR 0x002c
#define BOOT_PROM_BASE_ADDR 0x0030
#define BOOT_PROM_ADDR_MASK 0x0034
#define EEPROM_COMMAND 0x0040
#define EEPROM_DATA 0x0042
#define RECEIVE_FRAME_BYTE_COUNT 0x0050
#define INT_SQ 0x0120
#define RX_CFG 0x0102
#define RX_EVENT 0x0124
#define RX_CTL 0x0104
#define TX_CFG 0x0106
#define TX_EVENT 0x0128
#define TX_CMD 0x0108
#define BUF_CFG 0x010A
#define BUF_EVENT 0x012C
#define RX_MISS 0x0130
#define TX_COL 0x0132
#define LINE_CTL 0x0112
#define LINE_ST 0x0134
#define SELF_CTL 0x0114
#define SELF_ST 0x0136
#define BUS_CTL 0x0116
#define BUS_ST 0x0138
#define TEST_CTL 0x0118
#define AUI_TIME_DOMAIN 0x013C
#define TX_CMD_REQUEST 0x0144
#define TX_CMD_LENGTH 0x0146
#define LOGICAL_ADDR_FILTER_BASE 0x0150
#define INDIVIDUAL_ADDRESS 0x0158
#define RX_STATUS 0x0400
#define RX_LENGTH 0x0402
#define RX_FRAME 0x0404
#define TX_FRAME 0x0a00
//------------------------------------------------------------------------------
#define ISQ_ID_MASK 0x003F
#define SELF_CTL_RESET (1 << 6)
#define SELF_ST_SIBUSY (1 << 8)
#define SELF_ST_INITD (1 << 7)
#define LINE_CTL_MOD_BACKOFF (1 << 11)
#define LINE_CTL_AUI_ONLY (1 << 8)
#define LINE_CTL_TX_ON (1 << 7)
#define LINE_CTL_RX_ON (1 << 6)
#define RX_CFG_RX_OK_IE (1 << 8)
#define RX_CFG_SKIP_1 (1 << 6)
#define RX_CTL_BROADCAST (1 << 11)
#define RX_CTL_INDIVIDUAL (1 << 10)
#define RX_CTL_MULTICAST (1 << 9)
#define RX_CTL_RX_OK (1 << 8)
#define RX_CTL_PROMISCUOUS (1 << 7)
#define RX_CTL_IAHASH (1 << 6)
#define RX_EVENT_RX_OK (1 << 8)
#define RX_EVENT_ID 0x0004
#define TX_CMD_PAD_DIS (1 << 13)
#define TX_CMD_INHIBIT_CRC (1 << 12)
#define TX_CMD_ONECOLL (1 << 9)
#define TX_CMD_FORCE (1 << 8)
#define TX_CMD_START_5 (0 << 6)
#define TX_CMD_START_381 (1 << 6)
#define TX_CMD_START_1021 (2 << 6)
#define TX_CMD_START_ALL (3 << 6)
#define BUS_ST_TX_RDY (1 << 8)
#define BUS_CTL_ENABLE_IRQ (1 << 15)
//------------------------------------------------------------------------------
static UINT16 ReadPacketPage(UINT16 address);
static VOID WritePacketPage(UINT16 address, UINT16 data);
static UINT32 ComputeCRC(UINT8 *pBuffer, UINT32 length);
//------------------------------------------------------------------------------
//
// Function: CS8900AInit
//
BOOL CS8900AInit(UINT8 *pAddress, UINT32 offset, UINT16 mac[3])
{
BOOL rc = FALSE;
UINT32 count;
unsigned short get_data;
OALMSGS(OAL_ETHER&&OAL_FUNC, (
L"+CS8900A2413Init(0x%08x, 0x%08x, %02x:%02x:%02x:%02x:%02x:%02x)\r\n",
pAddress, offset, mac[0]&0xFF, mac[0]>>8, mac[1]&0xFF, mac[1]>>8,
mac[2]&0xFF, mac[2]>>8
));
// Save address
g_pCS8900 = (CS8900A_REGS*)pAddress;
#if (BSP_SMDK2413==1 && !SMDK2413_REV14)
dwEthernetIOBase = (DWORD)pAddress;
dwEthernetMemBase = offset;
RETAILMSG(1, (TEXT("dwEthernetIOBase is set as %x\n"), dwEthernetIOBase));
RETAILMSG(1, (TEXT("dwEthernetMemBase is set as %x\n"), dwEthernetMemBase));
#endif
// First check if there is chip
get_data = ReadPacketPage(EISA_NUMBER);
if (get_data != CS8900A_EISA_NUMBER) {
OALMSGS(OAL_ERROR, (L"ERROR: CS8900AInit: Failed detect chip(%x).\r\n", get_data));
goto cleanUp;
}
OALMSGS(OAL_INFO, (L"INFO: CS8900AInit chip detected\r\n"));
// Reset chip
WritePacketPage(SELF_CTL, SELF_CTL_RESET);
count = RETRY_COUNT;
while (count-- > 0) {
if ((ReadPacketPage(SELF_ST) & SELF_ST_INITD) != 0) break;
}
if (count == 0) {
OALMSGS(OAL_ERROR, (L"ERROR: CS8900AInit: Failed to reset card\r\n"));
goto cleanUp;
}
count = RETRY_COUNT;
while (count-- > 0) {
if ((ReadPacketPage(SELF_ST) & SELF_ST_SIBUSY) != 0) break;
}
if (count == 0) {
OALMSGS(OAL_ERROR, (L"ERROR: CS8900AInit: Failed to reset card\r\n"));
goto cleanUp;
}
// Set MAC address
WritePacketPage(INDIVIDUAL_ADDRESS + 0, mac[0]);
WritePacketPage(INDIVIDUAL_ADDRESS + 2, mac[1]);
WritePacketPage(INDIVIDUAL_ADDRESS + 4, mac[2]);
// Enable receive
WritePacketPage(RX_CTL, RX_CTL_RX_OK|RX_CTL_INDIVIDUAL|RX_CTL_BROADCAST);
// Enable interrupt on receive
WritePacketPage(RX_CFG, RX_CFG_RX_OK_IE);
// Let assume that hardware is using INTRQ0
WritePacketPage(INTERRUPT_NUMBER, 0);
// Enable
WritePacketPage(LINE_CTL, LINE_CTL_RX_ON|LINE_CTL_TX_ON);
// Done
rc = TRUE;
cleanUp:
OALMSGS(OAL_ETHER&&OAL_FUNC, (L"-CS8900AInit(rc = %d)\r\n", rc));
return rc;
}
//------------------------------------------------------------------------------
//
// Function: CS8900ASendFrame
//
UINT16 CS8900ASendFrame(UINT8 *pData, UINT32 length)
{
BOOL rc = FALSE;
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