startup.s

支持三星原产的S3C2413开发板

;
; Copyright (c) Microsoft Corporation.  All rights reserved.
;
;
; Use of this source code is subject to the terms of the Microsoft end-user
; license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
; If you did not accept the terms of the EULA, you are not authorized to use
; this source code. For a copy of the EULA, please see the LICENSE.RTF on your
; install media.
;


		INCLUDE kxarm.h
		INCLUDE armmacros.s
		INCLUDE s3c2413.inc

;-------------------------------------------------------------------------------

;MemoryMap	  EQU	0x2a4
;BANK_SIZE	   EQU	 0x00100000	  ; 1MB per bank in MemoryMap array
BANK_SHIFT	  EQU	 20


;   Define RAM space for the Page Tables:
;
PHYBASE		EQU		0x30000000	  ; physical start
PTs			EQU		0x30010000	  ; 1st level page table address (PHYBASE + 0x10000)
					; save room for interrupt vectors.

;-------------------------------------------------------------------------------

	TEXTAREA

	IMPORT  main

; Set up the MMU and Dcache for bootloader.
;
; This routine will initialize the first-level page table based up the contents
; of the MemoryMap array and enable the MMU and caches.
;
; Copy the image to RAM if it's not already running there.
;
; Include Files 



;------------------------------------------------------------------------------
; Sleep state constants 
; 
; Location of sleep data 

; BUGBUG - this needs to be declared as a local var.

SLEEPDATA_BASE_PHYSICAL	 EQU     0x30028000
;SLEEPDATA_BASE_PHYSICAL	 EQU	 0x30058000

; Sleep State memory locations

SleepState_Data_Start	   EQU	 (0)
SleepState_WakeAddr		 EQU	 (SleepState_Data_Start  + 0)
SleepState_MMUCTL		   EQU	 (SleepState_WakeAddr	+ WORD_SIZE)
SleepState_MMUTTB		   EQU	 (SleepState_MMUCTL	  + WORD_SIZE)
SleepState_MMUDOMAIN		EQU	 (SleepState_MMUTTB	  + WORD_SIZE)
SleepState_SVC_SP		   EQU	 (SleepState_MMUDOMAIN   + WORD_SIZE)
SleepState_SVC_SPSR		 EQU	 (SleepState_SVC_SP	  + WORD_SIZE)
SleepState_FIQ_SPSR		 EQU	 (SleepState_SVC_SPSR	+ WORD_SIZE)
SleepState_FIQ_R8		   EQU	 (SleepState_FIQ_SPSR	+ WORD_SIZE)
SleepState_FIQ_R9		   EQU	 (SleepState_FIQ_R8	  + WORD_SIZE)
SleepState_FIQ_R10		  EQU	 (SleepState_FIQ_R9	  + WORD_SIZE)
SleepState_FIQ_R11		  EQU	 (SleepState_FIQ_R10	 + WORD_SIZE)
SleepState_FIQ_R12		  EQU	 (SleepState_FIQ_R11	 + WORD_SIZE)
SleepState_FIQ_SP		   EQU	 (SleepState_FIQ_R12	 + WORD_SIZE)
SleepState_FIQ_LR		   EQU	 (SleepState_FIQ_SP	  + WORD_SIZE)
SleepState_ABT_SPSR		 EQU	 (SleepState_FIQ_LR	  + WORD_SIZE)
SleepState_ABT_SP		   EQU	 (SleepState_ABT_SPSR	+ WORD_SIZE)
SleepState_ABT_LR		   EQU	 (SleepState_ABT_SP	  + WORD_SIZE)
SleepState_IRQ_SPSR		 EQU	 (SleepState_ABT_LR	  + WORD_SIZE)
SleepState_IRQ_SP		   EQU	 (SleepState_IRQ_SPSR	+ WORD_SIZE)
SleepState_IRQ_LR		   EQU	 (SleepState_IRQ_SP	  + WORD_SIZE)
SleepState_UND_SPSR		 EQU	 (SleepState_IRQ_LR	  + WORD_SIZE)
SleepState_UND_SP		   EQU	 (SleepState_UND_SPSR	+ WORD_SIZE)
SleepState_UND_LR		   EQU	 (SleepState_UND_SP	  + WORD_SIZE)
SleepState_SYS_SP		   EQU	 (SleepState_UND_LR	  + WORD_SIZE)
SleepState_SYS_LR		   EQU	 (SleepState_SYS_SP	  + WORD_SIZE)
SleepState_Data_End		 EQU	 (SleepState_SYS_LR	  + WORD_SIZE)

SLEEPDATA_SIZE		  EQU	 (SleepState_Data_End - SleepState_Data_Start) / 4

;---------------------------------------------------------------------------
;
; Macro to feed the LED Reg (The GPIO) with the value desired for debugging.
; Uses physical address
;
; GPFDAT [7:4] is assigned to LEDs.

	MACRO
	LED_ON	$data

	LDR	r10, = GPFDN
	LDR	r11, = 0x00ff	;Pull-Down Disable
	STR	r11, [r10]
	
	LDR	r10, = GPFCON
	LDR	r11, = (0x5500)	; GPF[7:4] Output .
	STR	r11, [r10]
	LDR	r10, =GPFDAT
	LDR	r11, =$data
	MOV	 r11, r11, lsl #4	; [7:4]
  	STR	r11, [r10]
  	MEND


; LED_ON using virtual address
;
	MACRO
	VLED_ON	$data
	
	LDR	r10, = vGPFDN
	LDR	r11, = 0x00ff	;Pull-Down Disable
	STR	r11, [r10]
	
	LDR	r10, = vGPFCON
	LDR	r11, = (0x5500)	; GPF[7:4] Output .
	STR	r11, [r10]
	LDR	r10, =vGPFDAT
	LDR	r11, =$data
	MOV	 r11, r11, lsl #4	; [7:4]
  	STR	r11, [r10]
		MEND
   
;---------------------------------------------------------------------------


; External Variables 

; External Functions 

; Global Variables 
 
; Local Variables 
 
; Local Functions 

;-------------------------------------------------------------------------------
;   Function: Startup
;
;   Main entry point for CPU initialization.
;

	STARTUPTEXT
	LEAF_ENTRY	  StartUp
	
	; Jump over power-off code. 
1	b		ResetHandler
	b . ;%B1		;HandlerUndef	;handler for Undefined mode
	b . ;%B1		;HandlerSWI		;handler for SWI interrupt
	b . ;%B1		;HandlerPabort	;handler for PAbort
	b . ;%B1		;HandlerDabort	;handler for DAbort
	b . ;%B1		;				;reserved
	b . ;%B1		;HandlerIRQ		;handler for IRQ interrupt 
	b . ;%B1		;HandlerFIQ		;handler for FIQ interrupt


	
ResetHandler
	ldr		r0,=WTCON			;	Disable WatchDog.
	mov		r1,#0
	str		r1,[r0]

	ldr	 r0, = INTMSK
	ldr	 r1, = 0xffffffff		; disable all interrupts
	str	 r1, [r0]

	ldr	 r0, = INTSUBMSK
	ldr	 r1, = 0x7fff			 ; disable all sub interrupt
	str	 r1, [r0]

	ldr	 r0, = INTMOD
	mov	 r1, #0x0			; set all interrupt as IRQ
	str	 r1, [r0]


	ldr	r0, =BANK_CFG			; ebi 0x4880_0004
	ldr	r1, =BANK_CFG_VAL			; Refer s3c2413.inc
	str	r1,[r0]			

	ldr	 r0, = GPFCON
	ldr	r2,[r0]
	ldr	 r1, = 0x5500	  
	ldr	r3,= 0xff00
	bic	r2,r2,r3
	orr	r2,r2,r1
	str	 r2, [r0]



 LED_ON	~0x2

 	[ CHANGE_CLK_EBOOT=1	; Refer the S3c2413.inc.

 LED_ON	~0x3


	ldr		r0,=CLKDIVN			;	Set Clock Divider
	ldr		r1,[r0]
	bic		r1,r1,#0xf
	ldr		r2,=((Startup_USB48div<<6)+(Startup_ARMCLKdiv<<3)+(Startup_PCLKdiv<<2)+(Startup_HCLKdiv)) 
	orr		r1,r1,r2
	str		r1,[r0]			
 
 LED_ON	~0x4
 	ldr		r0,=UPLLCON			;	Set UPLL
	ldr		r1,=((0<<20)+(Startup_UMdiv<<12)+(Startup_UPdiv<<4)+(Startup_USdiv))
	str		r1,[r0]			

	nop
	nop
	nop
	nop
	nop
	nop
	nop
	
	ldr		r0,=MPLLCON			;	Set MPLL
	ldr		r1,=((0<<20)+(Startup_Mdiv<<12)+(Startup_Pdiv<<4)+(Startup_Sdiv))
	str		r1,[r0]			

 LED_ON	~0x5
	ldr		r0,=CLKSRC			;	Select MPLL clock out for SYSCLK
	ldr		r1,[r0]
	orr		r1,r1,#0x30			; Set MPLL=FCOUTmpll, UPLL=FOUTupll
	str		r1,[r0]		

	
 LED_ON	~0x6
	bl		InitMEM


 LED_ON	~0x7

	bl		InitSSMC	
	
	]	; End of PLL setting
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

 LED_ON	~0x9



	[ {FALSE}		
	; Clear RAM.
	;
	mov 	r1,#0
	mov 	r2,#0
	mov 	r3,#0
	mov 	r4,#0
	mov 	r5,#0
	mov 	r6,#0
	mov 	r7,#0
	mov 	r8,#0
	
	ldr		r0,=0x30100000   ; Start address (physical 0x3000.0000).
	ldr		r9,=0x03000000   ; 64MB of RAM.
20	
	stmia	r0!, {r1-r8}
	subs	r9, r9, #32 
	bne		%B20
	]
	
;------------------------------------------------------------------------------
;   Add for Power Management 

	ldr     r1, =GSTATUS2		   ; Determine Booting Mode
	ldr     r10, [r1]
	ldr	r2,=0x0
	eors     r10, r10,r2
	beq   BringUpWinCE				    ; if not wakeup from PowerOffmode

;	ldr	 r1, =MISCCR			 ; MISCCR's Bit 17, 18, 19 -> 0
;	ldr	 r0, [r1]
;	bic	 r0, r0, #(7 << 17)		  ; SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:L->H
;	str	 r0, [r1]
30


; Hardware setting end.	
;==================================================================

	;bl	loop_led


;------------------------------------------------------------------------------
;   Recover Process : Starting Point
;
;   0. Check that where it comes from
	ldr     r1, =GSTATUS2		   ; Determine Booting Mode
	ldr     r10, [r1]
	ldr	r2,=0x87654321
	eors     r10, r10,r2
	beq  JumpToRAM				    ; it comes from s/w reset

	ldr     r1, =GSTATUS2		   ; Determine Booting Mode
	ldr     r10, [r1]
	ldr	r2,=0x12345678
	eors     r10, r10,r2
	bne  BringUpWinCE				; it dosen't come from Sleep, s/w reset. something wrong.
	
	
;   1. Checksum Calculation saved Data
	ldr 	r5, =SLEEPDATA_BASE_PHYSICAL	; pointer to physical address of reserved Sleep mode info data structure 

	mov		r3, r5					; pointer for checksum calculation
	mov		r2, #0
	ldr		r0, =SLEEPDATA_SIZE		; get size of data structure to do checksum on
40
	ldr		r1, [r3], #4			; pointer to SLEEPDATA
	and		r1, r1, #0x1
	mov		r1, r1, LSL #31
	orr		r1, r1, r1, LSR #1
	add		r2, r2, r1
	subs		r0, r0, #1				; dec the count
	bne		%b40			        ; loop till done	

	ldr		r0,=GSTATUS3
	ldr		r3, [r0]				; get the Sleep data checksum from the Power Manager Scratch pad register
	teq		r2, r3			        ; compare to what we saved before going to sleep
	bne		BringUpWinCE			; bad news - do a cold boot - something wrong
	b		MMUENABLE


JumpToRAM
	ldr		r2, =0x200000					; offset into the RAM 
	ldr		r3, =0x30000000					; add physical base
	add		r2, r2, r3
	mov     pc, r2							;  & jump to StartUp address

;   2. MMU Enable
MMUENABLE
	ldr	 r10, [r5, #SleepState_MMUDOMAIN] ; load the MMU domain access info
	ldr	 r9,  [r5, #SleepState_MMUTTB]	; load the MMU TTB info 
	ldr	 r8,  [r5, #SleepState_MMUCTL]	; load the MMU control info 
	ldr	 r7,  [r5, #SleepState_WakeAddr ] ; load the LR address
	nop	 
	nop
	nop
	nop
	nop

; if software reset

	mov	 r1, #0
	teq	 r1, r7
	bne	 %f70
	bl	  BringUpWinCE

; clear Intpnd,srcpnd
       mvn     r2, #0
       ldr 	r3,=INTPND
       ldr	r4,=SRCPND
      str     r2, [r3]
      str     r2, [r4]

; wakeup routine
70	  mcr	 p15, 0, r10, c3, c0, 0	  ; setup access to domain 0
	mcr	 p15, 0, r9,  c2, c0, 0	  ; PT address
	mcr	 p15, 0, r0,  c8, c7, 0	  ; flush I+D TLBs
	mcr	 p15, 0, r8,  c1, c0, 0	  ; restore MMU control

;   3. Jump to Kernel Image's fw.s (Awake_address)

	mov	 pc, r7			  ;  jump to new VA (back up Power management stack)
	nop

;------------------------------------------------------------------------------
;   Add for Power Management ?